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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dfsl-imx-sdma.txt32 0 MCU domain SSI
62 0 High
73 val is the value of the bit (0 or 1).
79 reg = <0x83fb0000 0x4000>;
92 reg = <0x70014000 0x4000>;
95 dmas = <&sdma 24 1 0>,
96 <&sdma 25 1 0>;
108 fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
112 - <0 15 1> means that the offset is 0, so GPR0 is the register of the
115 - <0 16 1> means that the offset is 0, so GPR0 is the register of the
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dfsl,imx-sdma.yaml69 - MCU domain SSI: 0
99 - High: 0
143 reg = <0x83fb0000 0x4000>;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]