Searched +full:0 +full:x900000 (Results 1 – 25 of 56) sorted by relevance
123
8 - reg: physical base address (0x79000000) and length (0x900000) for controller13 interrupt number 0x10 to 0x1f.27 reg = <0x00 0x79000000 0x0 0x900000>;28 interrupts = <0x0 0x10 0x4>29 <0x0 0x11 0x4>30 <0x0 0x12 0x4>31 <0x0 0x13 0x4>32 <0x0 0x14 0x4>33 <0x0 0x15 0x4>34 <0x0 0x16 0x4>[all …]
8 u-boot@0 {9 reg = <0x0 0xe0000>; // 896KB14 reg = <0xe0000 0x20000>; // 128KB19 reg = <0x100000 0x900000>; // 9MB24 reg = <0xa00000 0x5600000>; // 86MB29 reg = <0x6000000 0x2000000>; // 32MB
18 wan_amber@0 {20 reg = <0x0>;25 reg = <0x1>;30 reg = <0x2>;35 reg = <0x3>;40 reg = <0x5>;45 reg = <0x6>;50 reg = <0x7>;55 reg = <0x8>;60 reg = <0x9>;[all …]
19 reg = <0x70000000 0x8000000>;40 pinctrl_nand_rb: nand-rb-0 {55 timer@0 {57 reg = <0>, <1>;67 pinctrl-0 = <73 slot@0 {74 reg = <0>;91 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;95 reg = <0x3 0x0 0x800000>;108 at91bootstrap@0 {[all …]
11 u-boot@0 {12 reg = <0x0 0xe0000>; // 896KB17 reg = <0xe0000 0x20000>; // 128KB22 reg = <0x100000 0x900000>; // 9MB27 reg = <0xa00000 0x2000000>; // 32MB32 reg = <0x2a00000 0x1600000>; // 22MB
8 #define __NR_OABI_SYSCALL_BASE 0x90000010 #define __NR_SYSCALL_BASE 018 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
17 #define __NR_OABI_SYSCALL_BASE 0x90000018 #define __NR_SYSCALL_MASK 0x0fffff21 #define __NR_SYSCALL_BASE 033 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
17 #define __NR_OABI_SYSCALL_BASE 0x90000020 #define __NR_SYSCALL_BASE 033 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
47 reg = <0x900000 0x4000>;
41 reg = <0x900000 0x4000>;
45 reg = <0x900000 0x100000>;48 reg-shift = <0>;55 pinctrl-0 = <&pinctrl_uart2>;
17 memory@0 {20 reg = <0x00000000 0x8000000>;28 bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M";37 #size-cells = <0>;54 ethernet-port@0 {67 reg = <0x30000000 0x03200000>;70 pinctrl-0 = <&pflash_default_pins>;75 /* Eraseblock at 0xfe0000 */76 fis-index-block = <0x7F>;82 pinctrl-0 = <&gpio0_default_pins>;[all …]
56 - description: Clock output names for SERDES 086 reg = <0x900000 0x2000>;96 mux-controls = <&serdes_mux 0>;
21 #define __NR_OABI_SYSCALL_BASE 0x90000022 #define __NR_SYSCALL_BASE 026 #define __ARM_NR_BASE (__NR_SYSCALL_BASE + 0x0f0000)
87 reg = <0x900000 0x4000>;