Searched +full:0 +full:xf8034000 (Results 1 – 15 of 15) sorted by relevance
38 reg = <0xf8034000 0x200>;42 ranges = <0x0 0xf8034000 0x800>;47 reg = <0x400 0x200>;50 pinctrl-0 = <&pinctrl_flx0_default>;52 #size-cells = <0>;57 mtd_dataflash@0 {59 reg = <0>;
39 reg = <0xf8034000 0x200>;43 ranges = <0x0 0xf8034000 0x800>;48 reg = <0x400 0x200>;51 pinctrl-0 = <&pinctrl_flx0_default>;53 #size-cells = <0>;58 flash@0 {60 reg = <0>;
17 reg = <0xf8034000 0x400>;26 pwms = <&pwm0 3 5000 0>
45 reg = <0xf8034000 0x400>;
19 reg = <0xf8038000 0x100>;20 interrupts = <43 4 0>;41 reg = <0xf803c000 0x100>;42 interrupts = <44 4 0>;64 reg = <0xf8034000 0x100>;65 interrupts = <42 4 0>;
28 #size-cells = <0>;30 cpu@0 {33 reg = <0>;40 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;45 reg = <0x740000 0x1000>;61 reg = <0x73C000 0x1000>;77 reg = <0x20000000 0x20000000>;83 #clock-cells = <0>;84 clock-frequency = <0>;89 #clock-cells = <0>;[all …]
36 #size-cells = <0>;38 cpu@0 {41 reg = <0>;47 reg = <0x20000000 0x10000000>;53 #clock-cells = <0>;58 #clock-cells = <0>;64 reg = <0x00300000 0x100000>;67 ranges = <0 0x00300000 0x100000>;78 #size-cells = <0>;80 reg = <0x00500000 0x100000[all …]
41 #size-cells = <0>;43 cpu@0 {46 reg = <0>;52 reg = <0x20000000 0x10000000>;58 #clock-cells = <0>;59 clock-frequency = <0>;64 #clock-cells = <0>;65 clock-frequency = <0>;71 reg = <0x00300000 0x8000>;74 ranges = <0 0x00300000 0x8000>;[all …]
43 #size-cells = <0>;45 cpu@0 {48 reg = <0>;54 reg = <0x20000000 0x10000000>;60 #clock-cells = <0>;61 clock-frequency = <0>;66 #clock-cells = <0>;67 clock-frequency = <0>;72 #clock-cells = <0>;79 reg = <0x00300000 0x8000>;[all …]
45 #size-cells = <0>;46 cpu@0 {49 reg = <0x0>;55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;60 reg = <0x20000000 0x8000000>;66 #clock-cells = <0>;67 clock-frequency = <0>;72 #clock-cells = <0>;73 clock-frequency = <0>;78 #clock-cells = <0>;[all …]
29 #size-cells = <0>;31 cpu@0 {34 reg = <0>;41 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;46 reg = <0x740000 0x1000>;62 reg = <0x73c000 0x1000>;78 reg = <0x20000000 0x20000000>;84 #clock-cells = <0>;85 clock-frequency = <0>;90 #clock-cells = <0>;[all …]
42 #size-cells = <0>;44 cpu@0 {47 reg = <0>;53 reg = <0x20000000 0x10000000>;59 #clock-cells = <0>;60 clock-frequency = <0>;65 #clock-cells = <0>;66 clock-frequency = <0>;72 reg = <0x00300000 0x8000>;75 ranges = <0 0x00300000 0x8000>;[all …]
44 #size-cells = <0>;46 cpu@0 {49 reg = <0>;55 reg = <0x20000000 0x10000000>;61 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;80 reg = <0x00300000 0x8000>;[all …]
46 #size-cells = <0>;47 cpu@0 {50 reg = <0x0>;56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;61 reg = <0x20000000 0x8000000>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;74 clock-frequency = <0>;79 #clock-cells = <0>;[all …]
37 #size-cells = <0>;39 cpu@0 {42 reg = <0>;48 reg = <0x20000000 0x10000000>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x00300000 0x100000>;68 ranges = <0 0x00300000 0x100000>;79 #size-cells = <0>;81 reg = <0x00500000 0x100000[all …]