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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Ddsi-phy-20nm.yaml53 reg = <0xfd922a00 0xd4>,
54 <0xfd922b00 0x2b0>,
55 <0xfd922d80 0x7b>;
61 #phy-cells = <0>;
Ddsi-phy-28nm.yaml58 reg = <0xfd922a00 0xd4>,
59 <0xfd922b00 0x2b0>,
60 <0xfd922d80 0x7b>;
66 #phy-cells = <0>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Ddsi.txt23 For DSI6G v2.0 onwards, we need also need the clock:
38 - panel@0: Node of panel connected to this DSI controller.
47 - pinctrl-0: the default pinctrl state (active)
53 - remote-endpoint: For port@0, set to phandle of the connected panel/bridge's
60 (DATAn, where n lies between 0 and 3). The clock lane position is fixed
66 data-lanes = <3 0 1 2>;
73 <0 1 2 3>
74 <1 2 3 0>
75 <2 3 0 1>
76 <3 0 1 2>
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-msm8226.dtsi23 memory@0 {
25 reg = <0x0 0x0>;
31 #clock-cells = <0>;
37 #clock-cells = <0>;
61 qcom,ipc = <&apcs 8 0>;
113 reg = <0x3000000 0x100000>;
118 reg = <0x0dc00000 0x1900000>;
141 qcom,local-pid = <0>;
165 reg = <0xf9000000 0x1000>,
166 <0xf9002000 0x1000>;
[all …]
Dqcom-msm8974.dtsi20 #clock-cells = <0>;
26 #clock-cells = <0>;
33 #size-cells = <0>;
34 interrupts = <GIC_PPI 9 0xf04>;
36 CPU0: cpu@0 {
40 reg = <0>;
108 reg = <0x0 0x0>;
113 interrupts = <GIC_PPI 7 0xf04>;
121 qcom,ipc = <&apcs 8 0>;
144 reg = <0x08000000 0x5100000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-msm8974.dtsi25 reg = <0x08000000 0x5100000>;
30 reg = <0x0d100000 0x100000>;
35 reg = <0x0d200000 0xa00000>;
40 reg = <0x0dc00000 0x1900000>;
45 reg = <0x0f500000 0x500000>;
50 reg = <0xfa00000 0x200000>;
55 reg = <0x0fc00000 0x160000>;
60 reg = <0x0fd60000 0x20000>;
66 reg = <0x0fd80000 0x180000>;
75 #size-cells = <0>;
[all …]