| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | nand_ids.c | 18 * name, device ID, page size, chip size in MiB, eraseblock size, options
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNRGAMA 64G 3.3V 8-bit",
50 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
58 LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
59 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
60 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
61 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, SZ_8K, SP_OPTIONS),
62 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, SZ_8K, SP_OPTIONS),
[all …]
|
| D | sm_common.c | 129 LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM", 0x5d, 2, SZ_8K, NAND_ROM),
130 LEGACY_ID_NAND("SmartMedia 4MiB 3,3V", 0xe3, 4, SZ_8K, 0),
131 LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V", 0xe5, 4, SZ_8K, 0),
132 LEGACY_ID_NAND("SmartMedia 4MiB 5V", 0x6b, 4, SZ_8K, 0),
133 LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM", 0xd5, 4, SZ_8K, NAND_ROM),
134 LEGACY_ID_NAND("SmartMedia 8MiB 3,3V", 0xe6, 8, SZ_8K, 0),
135 LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM", 0xd6, 8, SZ_8K, NAND_ROM),
136 LEGACY_ID_NAND("SmartMedia 16MiB 3,3V", 0x73, 16, SZ_16K, 0),
137 LEGACY_ID_NAND("SmartMedia 16MiB 3,3V ROM", 0x57, 16, SZ_16K, NAND_ROM),
138 LEGACY_ID_NAND("SmartMedia 32MiB 3,3V", 0x75, 32, SZ_16K, 0),
[all …]
|
| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | nand_ids.c | 18 * name, device ID, page size, chip size in MiB, eraseblock size, options
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
53 {"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
57 {"H27UCG8T2ETR-BC 64G 3.3V 8-bit",
68 LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
69 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
70 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
[all …]
|
| D | sm_common.c | 129 LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM", 0x5d, 2, SZ_8K, NAND_ROM),
130 LEGACY_ID_NAND("SmartMedia 4MiB 3,3V", 0xe3, 4, SZ_8K, 0),
131 LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V", 0xe5, 4, SZ_8K, 0),
132 LEGACY_ID_NAND("SmartMedia 4MiB 5V", 0x6b, 4, SZ_8K, 0),
133 LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM", 0xd5, 4, SZ_8K, NAND_ROM),
134 LEGACY_ID_NAND("SmartMedia 8MiB 3,3V", 0xe6, 8, SZ_8K, 0),
135 LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM", 0xd6, 8, SZ_8K, NAND_ROM),
136 LEGACY_ID_NAND("SmartMedia 16MiB 3,3V", 0x73, 16, SZ_16K, 0),
137 LEGACY_ID_NAND("SmartMedia 16MiB 3,3V ROM", 0x57, 16, SZ_16K, NAND_ROM),
138 LEGACY_ID_NAND("SmartMedia 32MiB 3,3V", 0x75, 32, SZ_16K, 0),
[all …]
|
| /kernel/linux/linux-5.10/Documentation/filesystems/ext4/ |
| D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an
11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory
12 pages). By default a filesystem can contain 2^32 blocks; if the '64bit'
13 feature is enabled, then a filesystem can have 2^64 blocks. The location
27 - 64KiB
54 - 8MiB
55 - 32MiB
56 - 128MiB
79 For 64-bit filesystems, limits are as follows:
89 - 64KiB
[all …]
|
| /kernel/linux/linux-6.6/Documentation/filesystems/ext4/ |
| D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an
11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory
12 pages). By default a filesystem can contain 2^32 blocks; if the '64bit'
13 feature is enabled, then a filesystem can have 2^64 blocks. The location
27 - 64KiB
54 - 8MiB
55 - 32MiB
56 - 128MiB
79 For 64-bit filesystems, limits are as follows:
89 - 64KiB
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.txt | 29 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
50 The plain variant has 128MiB of non-prefetchable memory space, whereas the
51 "dual" variant has 64MiB. Take this into account when describing the ranges.
97 ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
99 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
104 /* 128MiB at 0x00000000-0x07ffffff */
106 /* 64MiB at 0x00000000-0x03ffffff */
108 /* 64MiB at 0x00000000-0x03ffffff */
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | faraday,ftpci100.yaml | 21 The plain variant has 128MiB of non-prefetchable memory space, whereas the
22 "dual" variant has 64MiB. Take this into account when describing the ranges.
84 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB,
135 ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
137 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
142 /* 128MiB at 0x00000000-0x07ffffff */
144 /* 64MiB at 0x00000000-0x03ffffff */
146 /* 64MiB at 0x00000000-0x03ffffff */
|
| /kernel/linux/linux-5.10/drivers/mtd/ |
| D | ssfdc.c | 28 the 128MiB) */
43 #define MiB(x) ( KiB(x) * 1024L ) macro
46 1MiB 2MiB 4MiB 8MiB 16MiB 32MiB 64MiB 128MiB
50 SumSector 2,000 4,000 8,000 16,000 32,000 64,000 128,000 256,000
63 { MiB( 1), 125, 4, 4 },
64 { MiB( 2), 125, 4, 8 },
65 { MiB( 4), 250, 4, 8 },
66 { MiB( 8), 250, 4, 16 },
67 { MiB( 16), 500, 4, 16 },
68 { MiB( 32), 500, 8, 16 },
[all …]
|
| /kernel/linux/linux-6.6/drivers/mtd/ |
| D | ssfdc.c | 28 the 128MiB) */
43 #define MiB(x) ( KiB(x) * 1024L ) macro
46 1MiB 2MiB 4MiB 8MiB 16MiB 32MiB 64MiB 128MiB
50 SumSector 2,000 4,000 8,000 16,000 32,000 64,000 128,000 256,000
63 { MiB( 1), 125, 4, 4 },
64 { MiB( 2), 125, 4, 8 },
65 { MiB( 4), 250, 4, 8 },
66 { MiB( 8), 250, 4, 16 },
67 { MiB( 16), 500, 4, 16 },
68 { MiB( 32), 500, 8, 16 },
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/ |
| D | b44.h | 160 #define EMAC_INT_MIB 0x00000002 /* MIB Interrupt */
184 #define B44_MIB_CTRL 0x0438UL /* EMAC MIB Control */
186 #define B44_TX_GOOD_O 0x0500UL /* MIB TX Good Octets */
187 #define B44_TX_GOOD_P 0x0504UL /* MIB TX Good Packets */
188 #define B44_TX_O 0x0508UL /* MIB TX Octets */
189 #define B44_TX_P 0x050CUL /* MIB TX Packets */
190 #define B44_TX_BCAST 0x0510UL /* MIB TX Broadcast Packets */
191 #define B44_TX_MCAST 0x0514UL /* MIB TX Multicast Packets */
192 #define B44_TX_64 0x0518UL /* MIB TX <= 64 byte Packets */
193 #define B44_TX_65_127 0x051CUL /* MIB TX 65 to 127 byte Packets */
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
| D | b44.h | 160 #define EMAC_INT_MIB 0x00000002 /* MIB Interrupt */
184 #define B44_MIB_CTRL 0x0438UL /* EMAC MIB Control */
186 #define B44_TX_GOOD_O 0x0500UL /* MIB TX Good Octets */
187 #define B44_TX_GOOD_P 0x0504UL /* MIB TX Good Packets */
188 #define B44_TX_O 0x0508UL /* MIB TX Octets */
189 #define B44_TX_P 0x050CUL /* MIB TX Packets */
190 #define B44_TX_BCAST 0x0510UL /* MIB TX Broadcast Packets */
191 #define B44_TX_MCAST 0x0514UL /* MIB TX Multicast Packets */
192 #define B44_TX_64 0x0518UL /* MIB TX <= 64 byte Packets */
193 #define B44_TX_65_127 0x051CUL /* MIB TX 65 to 127 byte Packets */
[all …]
|
| /kernel/linux/linux-6.6/drivers/soc/atmel/ |
| D | soc.c | 96 "sam9x60 64MiB DDR2 SiP", "sam9x60"),
99 "sam9x60 128MiB DDR2 SiP", "sam9x60"),
102 "sam9x60 8MiB SDRAM SiP", "sam9x60"),
113 "sama5d225c 16MiB SiP", "sama5d2"),
134 "sama5d27c 128MiB SiP", "sama5d2"),
137 "sama5d27c 64MiB SiP", "sama5d2"),
140 "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
143 "sama5d27c 256MiB LPDDR2 SiP", "sama5d2"),
152 "sama5d28c 128MiB SiP", "sama5d2"),
155 "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
[all …]
|
| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | ck804xrom.c | 30 #define ROM_PROBE_STEP_SIZE (64*1024)
56 * 4MiB lower in the address space than the data.
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
71 * If all bits are enabled, we have a 16? MiB window
132 * set up by the BIOS, and the 4MiB offset for the lock registers in ck804xrom_init_one()
133 * requires the full 5MiB of window space. in ck804xrom_init_one()
145 window->phys = 0xffb00000; /* 5MiB */ in ck804xrom_init_one()
147 window->phys = 0xffc00000; /* 4MiB */ in ck804xrom_init_one()
[all …]
|
| D | scb2_flash.c | 17 * * a 4 MiB (32 Mib) 16 bit chip
18 * * a 1 MiB memory region
23 * the chip MUST BE at least 2 MiB. This also means that every block is
26 * One can only hope that these 4MiB x16 chips were a lot cheaper than 1MiB x8
34 * another separate (*.bbo) binary file. The 10 files are 64k of data + a
35 * small header. If the headers are stripped off, the 10 64k files can be
42 * offset 0xf0000 ty 0xfffff (64k): Boot Block region
|
| D | amd76xrom.c | 29 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
50 * 4MiB lower in the address space than the data.
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
117 * set up by the BIOS, and the 4MiB offset for the lock registers in amd76xrom_init_one()
118 * requires the full 5MiB of window space. in amd76xrom_init_one()
129 window->phys = 0xffb00000; /* 5MiB */ in amd76xrom_init_one()
132 window->phys = 0xffc00000; /* 4MiB */ in amd76xrom_init_one()
135 window->phys = 0xffff0000; /* 64KiB */ in amd76xrom_init_one()
|
| D | intel_vr_nor.c | 8 * has 64MiB of address space. The 2nd BAR of the Expansion Bus PCI Device
9 * is a 256MiB memory region containing the address spaces for all four of the
10 * chip selects, with start addresses hardcoded on 64MiB boundaries.
53 /* Maximum address space for Chip Select 0 is 64MiB */
|
| /kernel/linux/linux-6.6/drivers/mtd/maps/ |
| D | ck804xrom.c | 30 #define ROM_PROBE_STEP_SIZE (64*1024)
56 * 4MiB lower in the address space than the data.
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
71 * If all bits are enabled, we have a 16? MiB window
132 * set up by the BIOS, and the 4MiB offset for the lock registers in ck804xrom_init_one()
133 * requires the full 5MiB of window space. in ck804xrom_init_one()
145 window->phys = 0xffb00000; /* 5MiB */ in ck804xrom_init_one()
147 window->phys = 0xffc00000; /* 4MiB */ in ck804xrom_init_one()
[all …]
|
| D | scb2_flash.c | 17 * * a 4 MiB (32 Mib) 16 bit chip
18 * * a 1 MiB memory region
23 * the chip MUST BE at least 2 MiB. This also means that every block is
26 * One can only hope that these 4MiB x16 chips were a lot cheaper than 1MiB x8
34 * another separate (*.bbo) binary file. The 10 files are 64k of data + a
35 * small header. If the headers are stripped off, the 10 64k files can be
42 * offset 0xf0000 ty 0xfffff (64k): Boot Block region
|
| D | amd76xrom.c | 29 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
50 * 4MiB lower in the address space than the data.
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
117 * set up by the BIOS, and the 4MiB offset for the lock registers in amd76xrom_init_one()
118 * requires the full 5MiB of window space. in amd76xrom_init_one()
129 window->phys = 0xffb00000; /* 5MiB */ in amd76xrom_init_one()
132 window->phys = 0xffc00000; /* 4MiB */ in amd76xrom_init_one()
135 window->phys = 0xffff0000; /* 64KiB */ in amd76xrom_init_one()
|
| D | intel_vr_nor.c | 8 * has 64MiB of address space. The 2nd BAR of the Expansion Bus PCI Device
9 * is a 256MiB memory region containing the address spaces for all four of the
10 * chip selects, with start addresses hardcoded on 64MiB boundaries.
53 /* Maximum address space for Chip Select 0 is 64MiB */
|
| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | head-sharpsl.S | 66 /* Check for 64MiB flash - if found we have a Shepherd */
69 cmp r3, #0x76 @ 64MiB flash
77 /* Check for 16MiB flash - if found we have Spitz */
80 cmp r3, #0x73 @ 16MiB flash
|
| /kernel/linux/linux-6.6/arch/arm/boot/compressed/ |
| D | head-sharpsl.S | 66 /* Check for 64MiB flash - if found we have a Shepherd */
69 cmp r3, #0x76 @ 64MiB flash
77 /* Check for 16MiB flash - if found we have Spitz */
80 cmp r3, #0x73 @ 16MiB flash
|
| /kernel/linux/linux-5.10/include/net/ |
| D | udp.h | 341 #if BITS_PER_LONG == 64
358 #if BITS_PER_LONG == 64
408 if (is_udplite) SNMP_INC_STATS((net)->mib.udplite_statistics, field); \
409 else SNMP_INC_STATS((net)->mib.udp_statistics, field); } while(0)
411 if (is_udplite) __SNMP_INC_STATS((net)->mib.udplite_statistics, field); \
412 else __SNMP_INC_STATS((net)->mib.udp_statistics, field); } while(0)
415 if (is_udplite) __SNMP_INC_STATS((net)->mib.udplite_stats_in6, field);\
416 else __SNMP_INC_STATS((net)->mib.udp_stats_in6, field); \
419 if (__lite) SNMP_INC_STATS((net)->mib.udplite_stats_in6, field); \
420 else SNMP_INC_STATS((net)->mib.udp_stats_in6, field); \
[all …]
|
| /kernel/linux/linux-6.6/include/net/ |
| D | udp.h | 329 #if BITS_PER_LONG == 64
346 #if BITS_PER_LONG == 64
396 if (is_udplite) SNMP_INC_STATS((net)->mib.udplite_statistics, field); \
397 else SNMP_INC_STATS((net)->mib.udp_statistics, field); } while(0)
399 if (is_udplite) __SNMP_INC_STATS((net)->mib.udplite_statistics, field); \
400 else __SNMP_INC_STATS((net)->mib.udp_statistics, field); } while(0)
403 if (is_udplite) __SNMP_INC_STATS((net)->mib.udplite_stats_in6, field);\
404 else __SNMP_INC_STATS((net)->mib.udp_stats_in6, field); \
407 if (__lite) SNMP_INC_STATS((net)->mib.udplite_stats_in6, field); \
408 else SNMP_INC_STATS((net)->mib.udp_stats_in6, field); \
[all …]
|