Searched full:alp (Results 1 – 25 of 46) sorted by relevance
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356 alp:359 description: Represents the alternate low-power channel (ALP).370 Specifies the CRx pin(s) associated with the ALP in no particular381 Specifies the CTx pin(s) associated with the ALP in no particular388 description: Specifies the ALP's ATI fine fractional divider.394 description: Specifies the ALP's ATI coarse fractional multiplier.400 description: Specifies the ALP's ATI coarse fractional divider.406 description: Specifies the ALP's ATI compensation divider.412 description: Specifies the ALP's ATI target.419 description: Specifies the ALP's ATI base.[all …]
10 ILP's rate has to be calculated on runtime and it depends on ALP clock19 - clocks: has to reference an ALP clock32 clocks = <&alp>;
8 #define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */11 #define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */17 #define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */19 #define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */
246 #define BCMA_CC_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */333 #define BCMA_CC_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */345 #define BCMA_CC_PMU_STAT_HAVEALP 0x00000008 /* ALP available */470 /* ALP clock on pre-PMU chips */
245 #define BCMA_CC_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */331 #define BCMA_CC_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */343 #define BCMA_CC_PMU_STAT_HAVEALP 0x00000008 /* ALP available */468 /* ALP clock on pre-PMU chips */
55 #define CCS_FORCEALP 0x00000001 /* force ALP request */58 #define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */63 #define CCS_ALPAVAIL 0x00010000 /* ALP is available */65 #define CCS_BP_ON_APL 0x00040000 /* RO: running on ALP clock */72 /* ALP avail in chipc and pcmcia on 4328a0 */
55 /* ALP clock on pre-PMU chips */143 /* Read the latched number of ALP ticks per 4 ILP ticks */ in si_pmu_measure_alpclk()153 /* Calculate ALP frequency */ in si_pmu_measure_alpclk()
64 alp: oscillator { label123 clocks = <&alp>;214 clocks = <&alp>;
64 alp: oscillator { label123 clocks = <&alp>;260 clocks = <&alp>;
172 #define SSB_CHIPCO_SYSCLKCTL_FORCEALP 0x00000008 /* Force ALP (or HT if ALPen is not set */190 #define SSB_CHIPCO_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */193 #define SSB_CHIPCO_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */196 #define SSB_CHIPCO_CLKCTLST_HAVEALP 0x00010000 /* ALP available */224 #define SSB_CHIPCO_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */234 #define SSB_CHIPCO_PMU_STAT_HAVEALP 0x00000008 /* ALP available */
34 #define RCAR_DU_FEATURE_NO_BLENDING BIT(5) /* PnMR.SPIM does not have ALP nor EOR bits */
70 * and ALP can all be handled by acpi_als_read_value() below, while the ALR is
268 seq_printf(m, "CacheOp: rap=%d ras=%d alp=%d als=%d wrp=%d ucp=%d dsp=%d\n", in fscache_stats_show()
66 Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile 7901B83 - Add 29320ALP and 39320B Id's.
82 /* ChipClockCSR (ALP/HT ctl/status) */
101 /* 4706 CC and PMU watchdogs are clocked at 1/4 of ALP in bcma_chipco_watchdog_ticks_per_ms()