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/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
DMakefile3 obj-$(CONFIG_SUNXI_CCU) += sunxi-ccu.o
6 sunxi-ccu-y += ccu_common.o
7 sunxi-ccu-y += ccu_mmc_timing.o
8 sunxi-ccu-y += ccu_reset.o
11 sunxi-ccu-y += ccu_div.o
12 sunxi-ccu-y += ccu_frac.o
13 sunxi-ccu-y += ccu_gate.o
14 sunxi-ccu-y += ccu_mux.o
15 sunxi-ccu-y += ccu_mult.o
16 sunxi-ccu-y += ccu_phase.o
[all …]
DKconfig11 tristate "Support for the Allwinner newer F1C100s CCU"
16 tristate "Support for the Allwinner D1/R528/T113 CCU"
21 tristate "Support for the Allwinner D1/R528/T113 PRCM CCU"
26 tristate "Support for the Allwinner A64 CCU"
31 tristate "Support for the Allwinner A100 CCU"
36 tristate "Support for the Allwinner A100 PRCM CCU"
41 tristate "Support for the Allwinner H6 CCU"
46 tristate "Support for the Allwinner H616 CCU"
51 tristate "Support for the Allwinner H6 and H616 PRCM CCU"
56 tristate "Support for the Allwinner A10/A20 CCU"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ccu.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#
22 - allwinner,sun4i-a10-ccu
23 - allwinner,sun5i-a10s-ccu
24 - allwinner,sun5i-a13-ccu
25 - allwinner,sun6i-a31-ccu
26 - allwinner,sun7i-a20-ccu
27 - allwinner,sun8i-a23-ccu
28 - allwinner,sun8i-a33-ccu
29 - allwinner,sun8i-a83t-ccu
30 - allwinner,sun8i-a83t-r-ccu
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ccu.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#
22 - allwinner,sun4i-a10-ccu
23 - allwinner,sun5i-a10s-ccu
24 - allwinner,sun5i-a13-ccu
25 - allwinner,sun6i-a31-ccu
26 - allwinner,sun7i-a20-ccu
27 - allwinner,sun8i-a23-ccu
28 - allwinner,sun8i-a33-ccu
29 - allwinner,sun8i-a83t-ccu
30 - allwinner,sun8i-a83t-r-ccu
[all …]
/kernel/linux/linux-6.6/drivers/clk/bcm/
Dclk-kona.c16 * CCU. (I believe these polices are named "Deep Sleep", "Economy",
119 /* CCU access */
121 /* Read a 32-bit register value from a CCU's address space. */
122 static inline u32 __ccu_read(struct ccu_data *ccu, u32 reg_offset) in __ccu_read() argument
124 return readl(ccu->base + reg_offset); in __ccu_read()
127 /* Write a 32-bit register value into a CCU's address space. */
129 __ccu_write(struct ccu_data *ccu, u32 reg_offset, u32 reg_val) in __ccu_write() argument
131 writel(reg_val, ccu->base + reg_offset); in __ccu_write()
134 static inline unsigned long ccu_lock(struct ccu_data *ccu) in ccu_lock() argument
138 spin_lock_irqsave(&ccu->lock, flags); in ccu_lock()
[all …]
/kernel/linux/linux-5.10/drivers/clk/bcm/
Dclk-kona.c24 * CCU. (I believe these polices are named "Deep Sleep", "Economy",
127 /* CCU access */
129 /* Read a 32-bit register value from a CCU's address space. */
130 static inline u32 __ccu_read(struct ccu_data *ccu, u32 reg_offset) in __ccu_read() argument
132 return readl(ccu->base + reg_offset); in __ccu_read()
135 /* Write a 32-bit register value into a CCU's address space. */
137 __ccu_write(struct ccu_data *ccu, u32 reg_offset, u32 reg_val) in __ccu_write() argument
139 writel(reg_val, ccu->base + reg_offset); in __ccu_write()
142 static inline unsigned long ccu_lock(struct ccu_data *ccu) in ccu_lock() argument
146 spin_lock_irqsave(&ccu->lock, flags); in ccu_lock()
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsunxi-h3-h5.dtsi44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
66 <&ccu CLK_TCON0>, <&ccu CLK_HDMI>;
75 <&ccu CLK_TVE>;
118 clocks = <&ccu CLK_BUS_DE>,
119 <&ccu CLK_DE>;
122 resets = <&ccu RST_BUS_DE>;
154 clocks = <&ccu CLK_BUS_DMA>;
[all …]
Dsun6i-a31.dtsi48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
80 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
81 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
82 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
106 clocks = <&ccu CLK_CPU>;
[all …]
Dsun4i-a10.dtsi46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
67 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
68 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
69 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>;
77 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
78 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
79 <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
80 <&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>,
81 <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
[all …]
Dsun8i-r40.dtsi46 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/reset/sun8i-r40-ccu.h>
140 clocks = <&ccu CLK_BUS_DE>,
141 <&ccu CLK_DE>;
144 resets = <&ccu RST_BUS_DE>;
229 clocks = <&ccu CLK_BUS_DMA>;
232 resets = <&ccu RST_BUS_DMA>;
241 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
243 resets = <&ccu RST_BUS_SPI0>;
254 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
[all …]
Dsun5i.dtsi45 #include <dt-bindings/clock/sun5i-ccu.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
62 clocks = <&ccu CLK_CPU>;
75 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
85 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
86 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
188 clocks = <&ccu CLK_MBUS>;
199 clocks = <&ccu CLK_AHB_DMA>;
[all …]
Dsun8i-v3s.dtsi44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
63 <&ccu CLK_TCON0>;
76 clocks = <&ccu CLK_CPU>;
125 clocks = <&ccu CLK_BUS_DE>,
126 <&ccu CLK_DE>;
129 resets = <&ccu RST_BUS_DE>;
170 clocks = <&ccu CLK_BUS_TCON0>,
171 <&ccu CLK_TCON0>;
176 resets = <&ccu RST_BUS_TCON0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/
Dsun6i-a31.dtsi48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
50 #include <dt-bindings/reset/sun6i-a31-ccu.h>
70 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
71 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
72 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
73 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
81 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
82 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
83 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
107 clocks = <&ccu CLK_CPU>;
[all …]
Dsunxi-h3-h5.dtsi45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
67 <&ccu CLK_TCON0>, <&ccu CLK_HDMI>;
76 <&ccu CLK_TVE>;
119 clocks = <&ccu CLK_BUS_DE>,
120 <&ccu CLK_DE>;
123 resets = <&ccu RST_BUS_DE>;
155 clocks = <&ccu CLK_BUS_DMA>;
[all …]
Dsun4i-a10.dtsi46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
67 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
68 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
69 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>;
77 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
78 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>,
79 <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>,
80 <&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>,
81 <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>;
[all …]
Dsun8i-r40.dtsi47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
88 clocks = <&ccu CLK_CPU>;
97 clocks = <&ccu CLK_CPU>;
106 clocks = <&ccu CLK_CPU>;
115 clocks = <&ccu CLK_CPU>;
177 clocks = <&ccu CLK_BUS_DE>,
178 <&ccu CLK_DE>;
181 resets = <&ccu RST_BUS_DE>;
234 clocks = <&ccu CLK_BUS_DEINTERLACE>,
[all …]
Dsun5i.dtsi45 #include <dt-bindings/clock/sun5i-ccu.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
62 clocks = <&ccu CLK_CPU>;
75 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
85 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
86 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
188 clocks = <&ccu CLK_MBUS>;
199 clocks = <&ccu CLK_AHB_DMA>;
[all …]
Dsuniv-f1c100s.dtsi7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h>
8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h>
77 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
79 resets = <&ccu RST_BUS_SPI0>;
91 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
93 resets = <&ccu RST_BUS_SPI1>;
104 clocks = <&ccu CLK_BUS_MMC0>,
105 <&ccu CLK_MMC0>,
106 <&ccu CLK_MMC0_OUTPUT>,
107 <&ccu CLK_MMC0_SAMPLE>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/allwinner/
Dsun50i-h616.dtsi7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
27 clocks = <&ccu CLK_CPUX>;
35 clocks = <&ccu CLK_CPUX>;
43 clocks = <&ccu CLK_CPUX>;
51 clocks = <&ccu CLK_CPUX>;
127 ccu: clock@3001000 { label
128 compatible = "allwinner,sun50i-h616-ccu";
[all …]
Dsun50i-h6.dtsi5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
29 clocks = <&ccu CLK_CPUX>;
39 clocks = <&ccu CLK_CPUX>;
49 clocks = <&ccu CLK_CPUX>;
59 clocks = <&ccu CLK_CPUX>;
123 clocks = <&ccu CLK_BUS_DE>,
124 <&ccu CLK_DE>;
[all …]
Dsun50i-a64.dtsi6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
30 clocks = <&ccu CLK_TCON0>,
40 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
55 clocks = <&ccu CLK_CPUX>;
66 clocks = <&ccu CLK_CPUX>;
77 clocks = <&ccu CLK_CPUX>;
88 clocks = <&ccu CLK_CPUX>;
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/allwinner/
Dsunxi-d1s-t113.dtsi7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
12 #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
46 clocks = <&ccu CLK_APB0>,
148 ccu: clock-controller@2001000 { label
149 compatible = "allwinner,sun20i-d1-ccu";
162 clocks = <&ccu CLK_BUS_GPADC>;
163 resets = <&ccu RST_BUS_GPADC>;
174 clocks = <&ccu CLK_BUS_DMIC>,
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h6.dtsi5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
28 clocks = <&ccu CLK_CPUX>;
38 clocks = <&ccu CLK_CPUX>;
48 clocks = <&ccu CLK_CPUX>;
58 clocks = <&ccu CLK_CPUX>;
122 clocks = <&ccu CLK_DE>,
123 <&ccu CLK_BUS_DE>;
[all …]
Dsun50i-a64.dtsi6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
29 clocks = <&ccu CLK_TCON0>,
39 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
54 clocks = <&ccu CLK_CPUX>;
65 clocks = <&ccu CLK_CPUX>;
76 clocks = <&ccu CLK_CPUX>;
87 clocks = <&ccu CLK_CPUX>;
[all …]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
DMakefile24 obj-$(CONFIG_SUNIV_F1C100S_CCU) += ccu-suniv-f1c100s.o
25 obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
26 obj-$(CONFIG_SUN50I_A100_CCU) += ccu-sun50i-a100.o
27 obj-$(CONFIG_SUN50I_A100_R_CCU) += ccu-sun50i-a100-r.o
28 obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o
29 obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o
30 obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o
31 obj-$(CONFIG_SUN5I_CCU) += ccu-sun5i.o
32 obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o
33 obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o
[all …]

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