| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | spi-mt65xx.txt | 28 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
59 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | mediatek,spi-mt65xx.yaml | 107 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | mt7629-clk.h | 43 #define CLK_TOP_SYSPLL3_D2 33 macro
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| D | mt7622-clk.h | 37 #define CLK_TOP_SYSPLL3_D2 25 macro
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| D | mt6797-clk.h | 57 #define CLK_TOP_SYSPLL3_D2 47 macro
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| D | mt8173-clk.h | 62 #define CLK_TOP_SYSPLL3_D2 52 macro
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| D | mt6765-clk.h | 46 #define CLK_TOP_SYSPLL3_D2 11 macro
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| D | mt2712-clk.h | 45 #define CLK_TOP_SYSPLL3_D2 14 macro
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| D | mt2701-clk.h | 23 #define CLK_TOP_SYSPLL3_D2 13 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| D | mt7629-clk.h | 43 #define CLK_TOP_SYSPLL3_D2 33 macro
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| D | mediatek,mt6795-clk.h | 60 #define CLK_TOP_SYSPLL3_D2 49 macro
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| D | mt7622-clk.h | 37 #define CLK_TOP_SYSPLL3_D2 25 macro
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| D | mt6797-clk.h | 57 #define CLK_TOP_SYSPLL3_D2 47 macro
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| D | mt6765-clk.h | 46 #define CLK_TOP_SYSPLL3_D2 11 macro
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| D | mt8173-clk.h | 62 #define CLK_TOP_SYSPLL3_D2 52 macro
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| D | mediatek,mt8365-clk.h | 26 #define CLK_TOP_SYSPLL3_D2 16 macro
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| D | mt2712-clk.h | 45 #define CLK_TOP_SYSPLL3_D2 14 macro
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| D | mt2701-clk.h | 23 #define CLK_TOP_SYSPLL3_D2 13 macro
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/ |
| D | mt2701.dtsi | 342 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
402 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
415 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
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| D | mt7623.dtsi | 487 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
566 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
580 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | mt2701.dtsi | 343 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
403 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
416 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
| D | mt7623.dtsi | 488 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
567 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
581 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt7622.dtsi | 492 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
574 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt7622.dtsi | 500 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
593 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt7622.c | 279 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
|