| /kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-tmu.dtsi | 143 g3d_thermal: g3d-thermal {
148 g3d_alert_0: g3d-alert-0 {
153 g3d_alert_1: g3d-alert-1 {
158 g3d_alert_2: g3d-alert-2 {
163 g3d_alert_3: g3d-alert-3 {
168 g3d_alert_4: g3d-alert-4 {
173 g3d_alert_5: g3d-alert-5 {
178 g3d_alert_6: g3d-alert-6 {
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynos5433-tmu.dtsi | 143 g3d_thermal: g3d-thermal {
148 g3d_alert_0: g3d-alert-0 {
153 g3d_alert_1: g3d-alert-1 {
158 g3d_alert_2: g3d-alert-2 {
163 g3d_alert_3: g3d-alert-3 {
168 g3d_alert_4: g3d-alert-4 {
173 g3d_alert_5: g3d-alert-5 {
178 g3d_alert_6: g3d-alert-6 {
|
| /kernel/linux/linux-6.6/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 172 * ONEDRAM, MFC, G3D }
293 * 1. Temporary Change divider for MFC and G3D in s5pv210_target()
302 /* For MFC, G3D dividing */ in s5pv210_target()
308 * 2. Change SCLKA2M(200Mhz)to SCLKMPLL in MFC_MUX, G3D MUX in s5pv210_target()
394 * to SCLKA2M(200Mhz) in MFC_MUX and G3D MUX in s5pv210_target()
408 * 8. Change divider for MFC and G3D in s5pv210_target()
417 /* For MFC, G3D dividing */ in s5pv210_target()
|
| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 172 * ONEDRAM, MFC, G3D }
293 * 1. Temporary Change divider for MFC and G3D in s5pv210_target()
302 /* For MFC, G3D dividing */ in s5pv210_target()
308 * 2. Change SCLKA2M(200Mhz)to SCLKMPLL in MFC_MUX, G3D MUX in s5pv210_target()
394 * to SCLKA2M(200Mhz) in MFC_MUX and G3D MUX in s5pv210_target()
408 * 8. Change divider for MFC and G3D in s5pv210_target()
417 /* For MFC, G3D dividing */ in s5pv210_target()
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | samsung,exynos850-clock.yaml | 40 - samsung,exynos850-cmu-g3d
177 const: samsung,exynos850-cmu-g3d
184 - description: G3D clock (from CMU_TOP)
|
| D | samsung,exynos5433-clock.yaml | 27 # IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS domains and bus
48 - samsung,exynos5433-cmu-g3d
293 const: samsung,exynos5433-cmu-g3d
|
| D | samsung,exynos5260-clock.yaml | 57 - samsung,exynos5260-clock-g3d
226 const: samsung,exynos5260-clock-g3d
|
| D | samsung,exynos7885-clock.yaml | 83 - description: G3D clock (from CMU_TOP)
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/ |
| D | exynos-bus.txt | 61 |--- G3D
75 |--- G3D
93 |--- G3D
111 |--- G3D
150 |--- G3D
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interconnect/ |
| D | samsung,exynos-bus.yaml | 54 |--- G3D
97 |--- G3D
115 |--- G3D
133 |--- G3D
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | exynos5260-clock.txt | 59 8) "samsung,exynos5260-clock-g3d"
119 Input clocks for g3d clock controller:
|
| D | exynos5433-clock.txt | 10 which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
31 - "samsung,exynos5433-cmu-g3d" - clock controller compatible for CMU_G3D
123 Input clocks for g3d clock controller:
353 compatible = "samsung,exynos5433-cmu-g3d";
|
| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt2701-g3d.c | 55 .name = "clk-mt2701-g3d",
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | hi6220-domain-ctrl.yaml | 15 controller(e.g. codec, G3D ...) and the Power Management domain
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | hi6220-domain-ctrl.yaml | 15 controller(e.g. codec, G3D ...) and the Power Management domain
|
| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mt2701-g3d.c | 90 .name = "clk-mt2701-g3d",
|
| D | Makefile | 29 obj-$(CONFIG_COMMON_CLK_MT2701_G3DSYS) += clk-mt2701-g3d.o
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/devfreq/event/ |
| D | samsung,exynos-ppmu.yaml | 18 each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC). The
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/event/ |
| D | exynos-ppmu.txt | 8 usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
|
| /kernel/linux/linux-5.10/drivers/clk/hisilicon/ |
| D | clk-hi3660-stub.c | 107 DEFINE_CLK_STUB(HI3660_CLK_STUB_GPU, 0x0003030A, "clk-g3d")
|
| /kernel/linux/linux-6.6/drivers/clk/hisilicon/ |
| D | clk-hi3660-stub.c | 107 DEFINE_CLK_STUB(HI3660_CLK_STUB_GPU, 0x0003030A, "clk-g3d")
|
| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | clk-exynos5420.c | 1268 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
1273 { GATE_IP_G3D, 0x3ff, 0x3ff }, /* G3D gates */
1354 .pd_name = "G3D",
1667 * Keep top part of G3D clock path enabled permanently to ensure in exynos5x_clk_init()
1669 * main G3D clock enablement status. in exynos5x_clk_init()
|
| D | clk-exynos850.c | 307 /* G3D */
385 /* G3D */
449 /* G3D */
1852 .compatible = "samsung,exynos850-cmu-g3d",
|
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-exynos5420.c | 1265 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
1270 { GATE_IP_G3D, 0x3ff, 0x3ff }, /* G3D gates */
1351 .pd_name = "G3D",
1656 * Keep top part of G3D clock path enabled permanently to ensure in exynos5x_clk_init()
1658 * main G3D clock enablement status. in exynos5x_clk_init()
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5260.dtsi | 129 compatible = "samsung,exynos5260-clock-g3d";
|