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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/
Dqcom-lmh.yaml5 $id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
8 title: Qualcomm Limits Management Hardware(LMh)
14 Limits Management Hardware(LMh) is a hardware infrastructure on some
21 - qcom,sc8180x-lmh
22 - qcom,sdm845-lmh
23 - qcom,sm8150-lmh
39 phandle of the first cpu in the LMh cluster
42 qcom,lmh-temp-arm-millicelsius:
44 An integer expressing temperature threshold at which the LMh thermal
47 qcom,lmh-temp-low-millicelsius:
[all …]
/kernel/linux/linux-6.6/drivers/thermal/qcom/
Dlmh.c68 .name = "lmh",
112 ret = of_property_read_u32(np, "qcom,lmh-temp-high-millicelsius", &temp_high); in lmh_probe()
114 dev_err(dev, "missing qcom,lmh-temp-high-millicelsius property\n"); in lmh_probe()
118 ret = of_property_read_u32(np, "qcom,lmh-temp-low-millicelsius", &temp_low); in lmh_probe()
120 dev_err(dev, "missing qcom,lmh-temp-low-millicelsius property\n"); in lmh_probe()
124 ret = of_property_read_u32(np, "qcom,lmh-temp-arm-millicelsius", &temp_arm); in lmh_probe()
126 dev_err(dev, "missing qcom,lmh-temp-arm-millicelsius property\n"); in lmh_probe()
131 * Only sdm845 has lmh hardware currently enabled from hlos. If this is needed in lmh_probe()
140 dev_err(dev, "Wrong CPU id associated with LMh node\n"); in lmh_probe()
212 "lmh-irq", lmh_data); in lmh_probe()
[all …]
DKconfig40 hardware(LMh). LMh allows for hardware-enforced mitigation for cpus based on
42 LMh is configured in the firmware and this feature need not be enabled.
43 However, on certain SoCs like sdm845 LMh has to be configured from kernel.
DMakefile8 obj-$(CONFIG_QCOM_LMH) += lmh.o
/kernel/linux/linux-6.6/drivers/soc/qcom/
Dramp_controller.c41 * @num_lmh_sids: Number of LMh SIDs (max 8)
210 /* Program LMH, DFS, Link SIDs */ in qcom_ramp_controller_start()
/kernel/linux/linux-5.10/arch/s390/boot/
Dhead.S162 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
302 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
/kernel/linux/linux-6.6/drivers/cpufreq/
Dqcom-cpufreq-hw.c49 * Mutex to synchronize between de-init sequence and re-starting LMh
433 * Look for LMh interrupt. If no interrupt line is specified / in qcom_cpufreq_hw_lmh_init()
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsc8180x.dtsi3599 lmh@18350800 {
3600 compatible = "qcom,sc8180x-lmh";
3604 qcom,lmh-temp-arm-millicelsius = <65000>;
3605 qcom,lmh-temp-low-millicelsius = <94500>;
3606 qcom,lmh-temp-high-millicelsius = <95000>;
3611 lmh@18358800 {
3612 compatible = "qcom,sc8180x-lmh";
3616 qcom,lmh-temp-arm-millicelsius = <65000>;
3617 qcom,lmh-temp-low-millicelsius = <94500>;
3618 qcom,lmh-temp-high-millicelsius = <95000>;
Dsm8150.dtsi4368 lmh_cluster1: lmh@18350800 {
4369 compatible = "qcom,sm8150-lmh";
4373 qcom,lmh-temp-arm-millicelsius = <60000>;
4374 qcom,lmh-temp-low-millicelsius = <84500>;
4375 qcom,lmh-temp-high-millicelsius = <85000>;
4380 lmh_cluster0: lmh@18358800 {
4381 compatible = "qcom,sm8150-lmh";
4385 qcom,lmh-temp-arm-millicelsius = <60000>;
4386 qcom,lmh-temp-low-millicelsius = <84500>;
4387 qcom,lmh-temp-high-millicelsius = <85000>;
Dsdm845.dtsi3930 lmh_cluster1: lmh@17d70800 {
3931 compatible = "qcom,sdm845-lmh";
3935 qcom,lmh-temp-arm-millicelsius = <65000>;
3936 qcom,lmh-temp-low-millicelsius = <94500>;
3937 qcom,lmh-temp-high-millicelsius = <95000>;
3942 lmh_cluster0: lmh@17d78800 {
3943 compatible = "qcom,sdm845-lmh";
3947 qcom,lmh-temp-arm-millicelsius = <65000>;
3948 qcom,lmh-temp-low-millicelsius = <94500>;
3949 qcom,lmh-temp-high-millicelsius = <95000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-qcom-hw.yaml195 # On some SoCs the Prime core shares the LMH irq with Big cores
/kernel/linux/linux-6.6/arch/s390/boot/
Dhead.S243 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
/kernel/linux/linux-6.6/arch/s390/tools/
Dopcodes.txt1111 eb96 lmh RSY_RRRD
/kernel/linux/linux-5.10/arch/s390/tools/
Dopcodes.txt1092 eb96 lmh RSY_RRRD
/kernel/linux/linux-5.10/ipc/
Dutil.c9 * Chris Evans, <chris@ferret.lmh.ox.ac.uk>
/kernel/linux/linux-6.6/ipc/
Dutil.c9 * Chris Evans, <chris@ferret.lmh.ox.ac.uk>