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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-zx.txt7 - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The
8 PCLK is for register access, while WCLK is the reference clock for
20 clock-names = "pclk", "wclk";
/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-zx.c32 struct clk *wclk; member
86 rate = clk_get_rate(zpc->wclk); in zx_pwm_get_state()
107 rate = clk_get_rate(zpc->wclk); in zx_pwm_config()
174 ret = clk_prepare_enable(zpc->wclk); in zx_pwm_apply()
183 clk_disable_unprepare(zpc->wclk); in zx_pwm_apply()
216 zpc->wclk = devm_clk_get(&pdev->dev, "wclk"); in zx_pwm_probe()
217 if (IS_ERR(zpc->wclk)) in zx_pwm_probe()
218 return PTR_ERR(zpc->wclk); in zx_pwm_probe()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dzte,tdm.txt10 - clock-names: "wclk" for the wclk.
25 clock-names = "wclk", "pclk";
Dzte,zx-i2s.txt9 - clock-names: "wclk" for the wclk, "pclk" for the pclk to the I2S interface.
26 clock-names = "wclk", "pclk";
Drt5682.txt35 - #clock-cells : Should be set to '<1>', wclk and bclk sources provided.
70 clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk";
Dda7219.txt27 - clock-output-names : Names given for DAI clock outputs (WCLK & BCLK);
88 clock-output-names = "dai-wclk", "dai-bclk";
/kernel/linux/linux-6.6/drivers/staging/greybus/
Daudio_apbridgea.h13 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK
14 * - WCLK changes on the falling edge of BCLK
15 * - WCLK low for left channel; high for right channel
/kernel/linux/linux-5.10/drivers/staging/greybus/
Daudio_apbridgea.h13 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK
14 * - WCLK changes on the falling edge of BCLK
15 * - WCLK low for left channel; high for right channel
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Drt5682.txt50 - #clock-cells : Should be set to '<1>', wclk and bclk sources provided.
89 clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk";
Dti,tlv320adc3xxx.yaml56 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
74 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
Ddialog,da7219.yaml60 Name given for DAI WCLK and BCLK outputs.
212 clock-output-names = "da7219-dai-wclk", "da7219-dai-bclk";
Drealtek,rt5682s.yaml140 clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk";
/kernel/linux/linux-6.6/sound/soc/amd/
Dacp-da7219-max98357a.c76 da7219_dai_wclk = devm_clk_get(component->dev, "da7219-dai-wclk"); in cz_da7219_init()
112 * Set wclk to 48000 because the rate constraint of this driver is in da7219_clk_enable()
158 rt5682_dai_wclk = devm_clk_get(component->dev, "rt5682-dai-wclk"); in cz_rt5682_init()
197 * Set wclk to 48000 because the rate constraint of this driver is in rt5682_clk_enable()
204 dev_err(rtd->dev, "Error setting wclk rate: %d\n", ret); in rt5682_clk_enable()
214 dev_err(rtd->dev, "can't enable wclk %d\n", ret); in rt5682_clk_enable()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dsamsung,exynos4210-csis.yaml92 samsung,csis-wclk:
167 samsung,csis-wclk;
/kernel/linux/linux-6.6/sound/soc/codecs/
Dda7219.c1426 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; in da7219_set_dai_tdm_slot() local
1473 sr = clk_get_rate(wclk); in da7219_set_dai_tdm_slot()
1486 "Failed to set TDM BCLKs per WCLK %d: %d\n", in da7219_set_dai_tdm_slot()
1562 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; in da7219_hw_params() local
1597 if (da7219->master && wclk) { in da7219_hw_params()
1598 ret = clk_set_rate(wclk, sr); in da7219_hw_params()
1601 "Failed to set WCLK SR %lu: %d\n", sr, ret); in da7219_hw_params()
1652 "Failed to set BCLKs per WCLK %d: %d\n", in da7219_hw_params()
1776 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk"; in da7219_fw_to_pdata()
2083 * derived from multiple parent WCLK rates (BCLK rates are set as a in da7219_bclk_round_rate()
[all …]
Drt5682.c2664 * Only accept to set wclk rate to 44.1k or 48kHz. in rt5682_wclk_recalc_rate()
2687 * Only accept to set wclk rate to 44.1k or 48kHz. in rt5682_wclk_round_rate()
2717 * Whether the wclk's parent clk (mclk) exists or not, please ensure in rt5682_wclk_set_rate()
2718 * it is fixed or set to 48MHz before setting wclk rate. It's a in rt5682_wclk_set_rate()
2726 "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n", in rt5682_wclk_set_rate()
2808 * BCLK rates are set as a multiplier of WCLK in HW. in rt5682_bclk_round_rate()
2809 * We don't allow changing the parent WCLK. We just do in rt5682_bclk_round_rate()
2810 * some rounding down based on the parent WCLK rate in rt5682_bclk_round_rate()
2875 /* Make MCLK the parent of WCLK */ in rt5682_register_dai_clks()
2883 /* Make WCLK the parent of BCLK */ in rt5682_register_dai_clks()
/kernel/linux/linux-5.10/sound/soc/codecs/
Dda7219.c1426 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; in da7219_set_dai_tdm_slot() local
1473 sr = clk_get_rate(wclk); in da7219_set_dai_tdm_slot()
1486 "Failed to set TDM BCLKs per WCLK %d: %d\n", in da7219_set_dai_tdm_slot()
1562 struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX]; in da7219_hw_params() local
1597 if (da7219->master && wclk) { in da7219_hw_params()
1598 ret = clk_set_rate(wclk, sr); in da7219_hw_params()
1601 "Failed to set WCLK SR %lu: %d\n", sr, ret); in da7219_hw_params()
1652 "Failed to set BCLKs per WCLK %d: %d\n", in da7219_hw_params()
1774 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk"; in da7219_fw_to_pdata()
2081 * derived from multiple parent WCLK rates (BCLK rates are set as a in da7219_bclk_round_rate()
[all …]
Drt5682.c2599 * Only accept to set wclk rate to 44.1k or 48kHz. in rt5682_wclk_recalc_rate()
2623 * Only accept to set wclk rate to 44.1k or 48kHz. in rt5682_wclk_round_rate()
2651 * Whether the wclk's parent clk (mclk) exists or not, please ensure in rt5682_wclk_set_rate()
2652 * it is fixed or set to 48MHz before setting wclk rate. It's a in rt5682_wclk_set_rate()
2660 "Parent mclk of wclk not acquired in driver. Please ensure mclk was provided as %d Hz.\n", in rt5682_wclk_set_rate()
2743 * BCLK rates are set as a multiplier of WCLK in HW. in rt5682_bclk_round_rate()
2744 * We don't allow changing the parent WCLK. We just do in rt5682_bclk_round_rate()
2745 * some rounding down based on the parent WCLK rate in rt5682_bclk_round_rate()
2813 /* Make MCLK the parent of WCLK */ in rt5682_register_dai_clks()
2823 /* Make WCLK the parent of BCLK */ in rt5682_register_dai_clks()
/kernel/linux/linux-6.6/include/dt-bindings/sound/
Dtlv320adc3xxx.h19 #define ADC3XXX_GPIO_SECONDARY_WCLK 9 /* Codec interface secondary WCLK */
/kernel/linux/linux-6.6/sound/soc/amd/acp/
Dacp-mach.h62 struct clk *wclk; member
Dacp-mach-common.c77 clk_set_rate(drvdata->wclk, srate); in acp_clk_enable()
80 return clk_prepare_enable(drvdata->wclk); in acp_clk_enable()
129 drvdata->wclk = clk_get(component->dev, "rt5682-dai-wclk"); in acp_card_rt5682_init()
214 clk_disable_unprepare(drvdata->wclk); in acp_card_shutdown()
355 drvdata->wclk = clk_get(component->dev, "rt5682-dai-wclk"); in acp_card_rt5682s_init()
474 clk_set_rate(drvdata->wclk, srate); in acp_card_rt5682s_hw_params()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dsamsung-mipi-csis.txt25 - samsung,csis-wclk : CSI-2 wrapper clock selection. If this property is present
/kernel/linux/linux-5.10/sound/soc/zte/
Dzx-tdm.c388 zx_tdm->dai_wclk = devm_clk_get(&pdev->dev, "wclk"); in zx_tdm_probe()
390 dev_err(&pdev->dev, "Fail to get wclk\n"); in zx_tdm_probe()
Dzx-i2s.c397 zx_i2s->dai_wclk = devm_clk_get(&pdev->dev, "wclk"); in zx_i2s_probe()
399 dev_err(&pdev->dev, "Fail to get wclk\n"); in zx_i2s_probe()
/kernel/linux/linux-5.10/sound/soc/amd/
Dacp-da7219-max98357a.c76 da7219_dai_wclk = devm_clk_get(component->dev, "da7219-dai-wclk"); in cz_da7219_init()
110 * Set wclk to 48000 because the rate constraint of this driver is in da7219_clk_enable()

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