| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/ |
| D | mmu.json | 3 "PublicDescription": "Duration of a translation table walk handled by the MMU",
6 "BriefDescription": "Duration of a translation table walk handled by the MMU"
9 …": "Duration of a Stage 1 translation table walk handled by the MMU. This event is not counted whe…
12 …": "Duration of a Stage 1 translation table walk handled by the MMU. This event is not counted whe…
15 …": "Duration of a Stage 2 translation table walk handled by the MMU. This event is not counted whe…
18 …": "Duration of a Stage 2 translation table walk handled by the MMU. This event is not counted whe…
21 "PublicDescription": "Duration of a translation table walk requested by the LSU",
24 "BriefDescription": "Duration of a translation table walk requested by the LSU"
27 … "PublicDescription": "Duration of a translation table walk requested by the instruction side",
30 "BriefDescription": "Duration of a translation table walk requested by the instruction side"
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/elkhartlake/ |
| D | virtual-memory.json | 20 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
28 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
36 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
44 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
52 …g from start till PMH becomes idle again (ready to serve next walk). Includes EPT-walk intervals.",
74 …e number of page walks completed due to stores whose address translations missed in all Translatio…
82 …e number of page walks completed due to stores whose address translations missed in all Translatio…
90 …e number of page walks completed due to stores whose address translations missed in all Translatio…
98 …e number of page walks completed due to stores whose address translations missed in all Translatio…
106 …g from start till PMH becomes idle again (ready to serve next walk). Includes EPT-walk intervals.",
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/snowridgex/ |
| D | virtual-memory.json | 20 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
28 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
36 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
44 …mpleted due to loads (including SW prefetches) whose address translations missed in all Translatio…
52 …g from start till PMH becomes idle again (ready to serve next walk). Includes EPT-walk intervals.",
74 …e number of page walks completed due to stores whose address translations missed in all Translatio…
82 …e number of page walks completed due to stores whose address translations missed in all Translatio…
90 …e number of page walks completed due to stores whose address translations missed in all Translatio…
98 …e number of page walks completed due to stores whose address translations missed in all Translatio…
106 …g from start till PMH becomes idle again (ready to serve next walk). Includes EPT-walk intervals.",
[all …]
|
| /kernel/linux/linux-6.6/drivers/of/ |
| D | fdt_address.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * FDT Address translation based on u-boot fdt_support.c which in turn was
4 * based on the kernel unflattened DT address translation code.
9 * Copyright 2010-2011 Freescale Semiconductor, Inc.
20 /* Max address size we deal with */
30 while(na--) in of_dump_addr()
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
84 return da - cp; in fdt_bus_default_map()
93 addr[na - 2] = cpu_to_fdt32(a >> 32); in fdt_bus_default_translate()
[all …]
|
| /kernel/linux/linux-5.10/drivers/of/ |
| D | fdt_address.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * FDT Address translation based on u-boot fdt_support.c which in turn was
4 * based on the kernel unflattened DT address translation code.
9 * Copyright 2010-2011 Freescale Semiconductor, Inc.
20 /* Max address size we deal with */
30 while(na--) in of_dump_addr()
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
84 return da - cp; in fdt_bus_default_map()
93 addr[na - 2] = cpu_to_fdt32(a >> 32); in fdt_bus_default_translate()
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/gasket/ |
| D | gasket_page_table.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Gasket Page Table functionality. This file describes the address
4 * translation/paging functionality supported by the Gasket driver framework.
5 * As much as possible, internal details are hidden to simplify use -
6 * all calls are thread-safe (protected by an internal mutex) except where
22 * Structure used for managing address translation on a device. All details are
28 * Allocate and init address translation data.
30 * @att_base_reg: [Mapped] pointer to the first entry in the device's address
31 * translation table.
33 * the starting index of the extended translation table.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/ |
| D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
15 controller registers provide the control for the translation from the offset
16 within each bank to the CPU-viewed address. The needed setup includes the
17 base address, the size of each bank. Optionally, some timing parameters can
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/ |
| D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
15 controller registers provide the control for the translation from the offset
16 within each bank to the CPU-viewed address. The needed setup includes the
17 base address, the size of each bank. Optionally, some timing parameters can
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/ |
| D | iommu.txt | 10 * Remap address space to allow devices to access physical memory ranges that
13 Example: 32-bit DMA to 64-bit physical addresses
15 * Implement scatter-gather at page level granularity so that the device does
20 address regions.
22 * Provide address space isolation between multiple contexts.
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
30 typically have a fixed association to the master device, whereas multiple-
34 "dma-ranges" property that describes how the physical address space of the
35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a
39 --------------------
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/mm/ |
| D | fault.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 1995-2004 Russell King
19 #include <linux/page-flags.h>
33 #include <asm/debug-monitors.h>
108 return __pa_symbol(mm->pgd); in mm_to_pgd_phys()
110 return (unsigned long)virt_to_phys(mm->pgd); in mm_to_pgd_phys()
124 mm = current->active_mm; in show_pte()
126 pr_alert("[%016lx] user address but active_mm is swapper\n", in show_pte()
134 pr_alert("[%016lx] address between user and kernel address ranges\n", in show_pte()
139 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", in show_pte()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/scsi/ |
| D | aha152x.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
26 IOPORT base io address (0x340/0x140)
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
33 EXT_TRANS: enable extended translation (0/1: default 0 [off])
42 - DAUTOCONF
43 use configuration the controller reports (AHA-152x only)
[all …]
|
| /kernel/linux/linux-5.10/Documentation/scsi/ |
| D | aha152x.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
26 IOPORT base io address (0x340/0x140)
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
33 EXT_TRANS: enable extended translation (0/1: default 0 [off])
42 - DAUTOCONF
43 use configuration the controller reports (AHA-152x only)
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/mm/ |
| D | fault.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 1995-2004 Russell King
21 #include <linux/page-flags.h>
36 #include <asm/debug-monitors.h>
115 esr_to_fault_info(esr)->name); in mem_abort_decode()
125 return __pa_symbol(mm->pgd); in mm_to_pgd_phys()
127 return (unsigned long)virt_to_phys(mm->pgd); in mm_to_pgd_phys()
141 mm = current->active_mm; in show_pte()
143 pr_alert("[%016lx] user address but active_mm is swapper\n", in show_pte()
151 pr_alert("[%016lx] address between user and kernel address ranges\n", in show_pte()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/virt/kvm/x86/ |
| D | mmu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 - correctness:
18 - security:
21 - performance:
23 - scaling:
25 - hardware:
27 - integration:
31 - dirty tracking:
33 and framebuffer-based displays
34 - footprint:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/virt/kvm/ |
| D | mmu.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 - correctness:
18 - security:
21 - performance:
23 - scaling:
25 - hardware:
27 - integration:
31 - dirty tracking:
33 and framebuffer-based displays
34 - footprint:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | tagged-pointers.rst | 10 addresses in the AArch64 translation system and their potential uses
13 The kernel configures the translation tables so that translations made
15 the virtual address ignored by the translation hardware. This frees up
20 --------------------------------------
23 an address tag of 0x00, unless the application enables the AArch64
24 Tagged Address ABI explicitly
25 (Documentation/arm64/tagged-address-abi.rst).
29 - pointer arguments to system calls, including pointers in structures
32 - the stack pointer (sp), e.g. when interpreting it to deliver a
35 - the frame pointer (x29) and frame records, e.g. when interpreting
[all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/arm64/ |
| D | tagged-pointers.rst | 10 addresses in the AArch64 translation system and their potential uses
13 The kernel configures the translation tables so that translations made
15 the virtual address ignored by the translation hardware. This frees up
20 --------------------------------------
23 an address tag of 0x00, unless the application enables the AArch64
24 Tagged Address ABI explicitly
25 (Documentation/arch/arm64/tagged-address-abi.rst).
29 - pointer arguments to system calls, including pointers in structures
32 - the stack pointer (sp), e.g. when interpreting it to deliver a
35 - the frame pointer (x29) and frame records, e.g. when interpreting
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
17 between child address space and parent address space
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
30 There must be a sub-node for each job queue present in RAID Engine
31 This node must be a sub-node of the main RAID Engine node
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
17 between child address space and parent address space
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
30 There must be a sub-node for each job queue present in RAID Engine
31 This node must be a sub-node of the main RAID Engine node
[all …]
|
| /kernel/linux/linux-6.6/drivers/dma/fsl-dpaa2-qdma/ |
| D | dpaa2-qdma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 u32 rbpcmd; /* Route-by-port command */
37 #define QMAN_FD_BMT_ENABLE BIT(15) /* bypass memory translation */
38 #define QMAN_FD_BMT_DISABLE (0) /* bypass memory translation */
53 #define QMAN_FD_VA_ENABLE BIT(14) /* Address used is virtual address */
54 #define QMAN_FD_VA_DISABLE (0)/* Address used is a real address */
55 /* Flow Context: 49bit physical address */
57 #define QMAN_FD_CBMT_DISABLE (0) /* Flow Context: 64bit virtual address */
62 #define QDMA_FL_BMT_ENABLE BIT(15) /* enable bypass memory translation */
63 #define QDMA_FL_BMT_DISABLE (0x0) /* enable bypass memory translation */
[all …]
|
| /kernel/linux/linux-5.10/drivers/dma/fsl-dpaa2-qdma/ |
| D | dpaa2-qdma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 u32 rbpcmd; /* Route-by-port command */
37 #define QMAN_FD_BMT_ENABLE BIT(15) /* bypass memory translation */
38 #define QMAN_FD_BMT_DISABLE (0) /* bypass memory translation */
53 #define QMAN_FD_VA_ENABLE BIT(14) /* Address used is virtual address */
54 #define QMAN_FD_VA_DISABLE (0)/* Address used is a real address */
55 /* Flow Context: 49bit physical address */
57 #define QMAN_FD_CBMT_DISABLE (0) /* Flow Context: 64bit virtual address */
62 #define QDMA_FL_BMT_ENABLE BIT(15) /* enable bypass memory translation */
63 #define QDMA_FL_BMT_DISABLE (0x0) /* enable bypass memory translation */
[all …]
|
| /kernel/linux/linux-6.6/drivers/acpi/acpica/ |
| D | rsdumpinfo.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: rsdumpinfo - Tables used to display resource descriptors.
59 "Start-Dependent-Functions", NULL},
70 "End-Dependent-Functions", NULL}
75 {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(io.io_decode), "Address Decoding",
77 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(io.minimum), "Address Minimum", NULL},
78 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(io.maximum), "Address Maximum", NULL},
80 {ACPI_RSD_UINT8, ACPI_RSD_OFFSET(io.address_length), "Address Length",
87 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(fixed_io.address), "Address", NULL},
89 "Address Length", NULL}
[all …]
|
| /kernel/linux/linux-5.10/drivers/acpi/acpica/ |
| D | rsdumpinfo.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: rsdumpinfo - Tables used to display resource descriptors.
59 "Start-Dependent-Functions", NULL},
70 "End-Dependent-Functions", NULL}
75 {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(io.io_decode), "Address Decoding",
77 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(io.minimum), "Address Minimum", NULL},
78 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(io.maximum), "Address Maximum", NULL},
80 {ACPI_RSD_UINT8, ACPI_RSD_OFFSET(io.address_length), "Address Length",
87 {ACPI_RSD_UINT16, ACPI_RSD_OFFSET(fixed_io.address), "Address", NULL},
89 "Address Length", NULL}
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | designware-pcie.txt | 4 - compatible:
5 "snps,dw-pcie" for RC mode;
6 "snps,dw-pcie-ep" for EP mode;
7 - reg: For designware cores version < 4.80 contains the configuration
8 address space. For designware core version >= 4.80, contains
9 the configuration and ATU address space
10 - reg-names: Must be "config" for the PCIe configuration space and "atu" for
11 the ATU address space.
12 (The old way of getting the configuration address space from "ranges"
15 - #address-cells: set to <3>
[all …]
|
| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | ntb.rst | 5 NTB (Non-Transparent Bridge) is a type of PCI-Express bridge chip that connects
6 the separate memory systems of two or more computers to the same PCI-Express
8 registers and memory translation windows, as well as non common features like
9 scratchpad and message registers. Scratchpad registers are read-and-writable
11 exchange a small amount of information at a fixed address. Message registers can
36 ----------------------------------------
42 inbound translation configured on the local ntb port and outbound translation
46 Inbound translation:
50 | dma-mapped |-ntb_mw_set_trans(addr) |
52 | (addr) |<======| MW xlat addr |<====| MW base addr |<== memory-mapped IO
[all …]
|