Searched full:apusys_pll (Results 1 – 5 of 5) sorted by relevance
20 The devices except apusys_pll provide clock gate control in different IP blocks.21 The apusys_pll provides Plls which generated from SoC 26m for AI Processing Unit.51 - mediatek,mt8195-apusys_pll234 apusys_pll: clock-controller@190f3000 {235 compatible = "mediatek,mt8195-apusys_pll";
99 { .compatible = "mediatek,mt8195-apusys_pll", },108 .name = "clk-mt8195-apusys_pll",
131 obj-$(CONFIG_COMMON_CLK_MT8195_APUSYS) += clk-mt8195-apusys_pll.o
733 /* APUSYS_PLL */
2510 apusys_pll: clock-controller@190f3000 { label2511 compatible = "mediatek,mt8195-apusys_pll";