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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Drenesas,bsc.yaml2 ---
3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Renesas Bus State Controller (BSC)
9 - Geert Uytterhoeven <geert+renesas@glider.be>
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
20 connected to the BSC can be accessed, the PM domain containing the BSC
21 must be powered on, and the functional clock driving the BSC must be
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Drenesas,bsc.yaml2 ---
3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 title: Renesas Bus State Controller (BSC)
9 - Geert Uytterhoeven <geert+renesas@glider.be>
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
18 While the BSC is a fairly simple memory-mapped bus, it may be part of a
20 connected to the BSC can be accessed, the PM domain containing the BSC
21 must be powered on, and the functional clock driving the BSC must be
24 The bindings for the BSC extend the bindings for "simple-pm-bus".
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsh73a0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC
8 #include <dt-bindings/clock/sh73a0-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "renesas,sh73a0";
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
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Dsh73a0-kzm9g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the KZM-A9-GT board
7 * Based on sh73a0-kzm9g.dts
11 /dts-v1/;
12 #include "sh73a0.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 model = "KZM-A9-GT";
19 compatible = "renesas,kzm9g", "renesas,sh73a0";
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/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dsh73a0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC
8 #include <dt-bindings/clock/sh73a0-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "renesas,sh73a0";
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
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Dsh73a0-kzm9g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the KZM-A9-GT board
7 * Based on sh73a0-kzm9g.dts
11 /dts-v1/;
12 #include "sh73a0.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 model = "KZM-A9-GT";
19 compatible = "renesas,kzm9g", "renesas,sh73a0";
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/kernel/linux/linux-5.10/drivers/clk/renesas/
Dclk-mstp.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car MSTP clocks
12 #include <linux/clk-provider.h>
31 * struct mstp_clock_group - MSTP gating clocks group
37 * @width_8bit: registers are 8-bit, not 32-bit
50 * struct mstp_clock - MSTP gating clock
51 * @hw: handle between common and hardware-specific interfaces
66 return group->width_8bit ? readb(reg) : readl(reg); in cpg_mstp_read()
72 group->width_8bit ? writeb(val, reg) : writel(val, reg); in cpg_mstp_write()
78 struct mstp_clock_group *group = clock->group; in cpg_mstp_clock_endisable()
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/kernel/linux/linux-6.6/drivers/clk/renesas/
Dclk-mstp.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car MSTP clocks
12 #include <linux/clk-provider.h>
32 * struct mstp_clock_group - MSTP gating clocks group
38 * @width_8bit: registers are 8-bit, not 32-bit
51 * struct mstp_clock - MSTP gating clock
52 * @hw: handle between common and hardware-specific interfaces
67 return group->width_8bit ? readb(reg) : readl(reg); in cpg_mstp_read()
73 group->width_8bit ? writeb(val, reg) : writel(val, reg); in cpg_mstp_write()
79 struct mstp_clock_group *group = clock->group; in cpg_mstp_clock_endisable()
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/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
Dpfc-sh73a0.c1 // SPDX-License-Identifier: GPL-2.0
3 * sh73a0 processor support - PFC hardware block
11 #include <linux/pinctrl/pinconf-generic.h>
52 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
56 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
60 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
64 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
65 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
66 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
67 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
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/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
Dpfc-sh73a0.c1 // SPDX-License-Identifier: GPL-2.0
3 * sh73a0 processor support - PFC hardware block
11 #include <linux/pinctrl/pinconf-generic.h>
53 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
57 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
61 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
65 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
66 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
67 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
68 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
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