| /kernel/linux/linux-6.6/drivers/pwm/ |
| D | pwm-ntxec.c | 16 * - The period and duty cycle can't be changed together in one atomic action.
45 * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
58 int period, int duty) in ntxec_pwm_set_raw_period_and_duty_cycle() argument
63 * Changes to the period and duty cycle take effect as soon as the in ntxec_pwm_set_raw_period_and_duty_cycle()
66 * duty cycle is fully written. If, in such a case, the old duty cycle in ntxec_pwm_set_raw_period_and_duty_cycle()
69 * To minimize the time between the changes to period and duty cycle in ntxec_pwm_set_raw_period_and_duty_cycle()
75 { NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8) }, in ntxec_pwm_set_raw_period_and_duty_cycle()
77 { NTXEC_REG_DUTY_LOW, ntxec_reg8(duty) }, in ntxec_pwm_set_raw_period_and_duty_cycle()
87 unsigned int period, duty; in ntxec_pwm_apply() local
94 duty = min_t(u64, state->duty_cycle, period); in ntxec_pwm_apply()
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| D | pwm-sunplus.c | 17 * - In .apply() PWM output need to write register FREQ and DUTY. When first write FREQ
18 * done and not yet write DUTY, it has short timing gap use new FREQ and old DUTY.
60 u32 dd_freq, duty, mode0, mode1; in sunplus_pwm_apply() local
103 /* cal and set pwm duty */ in sunplus_pwm_apply()
111 duty = SP7021_PWM_DUTY_DD_SEL(pwm->hwpwm) | SP7021_PWM_DUTY_MAX; in sunplus_pwm_apply()
117 duty = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, in sunplus_pwm_apply()
119 duty = SP7021_PWM_DUTY_DD_SEL(pwm->hwpwm) | duty; in sunplus_pwm_apply()
121 writel(duty, priv->base + SP7021_PWM_DUTY(pwm->hwpwm)); in sunplus_pwm_apply()
132 u32 mode0, dd_freq, duty; in sunplus_pwm_get_state() local
140 duty = readl(priv->base + SP7021_PWM_DUTY(pwm->hwpwm)); in sunplus_pwm_get_state()
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| D | pwm-renesas-tpu.c | 78 u16 duty; member
179 tpu_pwm_write(tpd, TPU_TGRAn, tpd->duty); in tpu_pwm_timer_start()
183 tpd->channel, tpd->duty, tpd->period); in tpu_pwm_timer_start()
227 tpd->duty = 0; in tpu_pwm_request()
253 u32 duty; in tpu_pwm_config() local
305 duty = mul_u64_u64_div_u64(clk_rate, duty_ns, in tpu_pwm_config()
308 duty = 0; in tpu_pwm_config()
311 "rate %u, prescaler %u, period %u, duty %u\n", in tpu_pwm_config()
312 clk_rate, 1 << (2 * prescaler), (u32)period, duty); in tpu_pwm_config()
319 tpd->duty = duty; in tpu_pwm_config()
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| D | pwm-sprd.c | 75 u32 val, duty, prescale; in sprd_pwm_get_state() local
99 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_get_state()
102 * duty_ns = NSEC_PER_SEC * (prescale + 1) * duty / clk_rate in sprd_pwm_get_state()
110 duty = val & SPRD_PWM_DUTY_MSK; in sprd_pwm_get_state()
111 tmp = (prescale + 1) * NSEC_PER_SEC * duty; in sprd_pwm_get_state()
126 u32 prescale, duty; in sprd_pwm_config() local
132 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_config()
139 duty = duty_ns * SPRD_PWM_MOD_MAX / period_ns; in sprd_pwm_config()
148 * Note: Writing DUTY triggers the hardware to actually apply the in sprd_pwm_config()
149 * values written to MOD and DUTY to the output, so must keep writing in sprd_pwm_config()
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| D | pwm-atmel-tcb.c | 37 unsigned duty; /* PWM duty expressed in clk cycles */ member
81 tcbpwm->duty = 0; in atmel_tcb_pwm_request()
95 &tcbpwm->duty); in atmel_tcb_pwm_request()
99 &tcbpwm->duty); in atmel_tcb_pwm_request()
131 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_disable()
138 if (tcbpwm->duty == 0) in atmel_tcb_pwm_disable()
188 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_enable()
195 if (tcbpwm->duty == 0) in atmel_tcb_pwm_enable()
221 * If duty is 0 or equal to period there's no need to register in atmel_tcb_pwm_enable()
226 if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) { in atmel_tcb_pwm_enable()
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| D | pwm-cros-ec.c | 35 * @duty_cycle: cached duty cycle
81 u16 duty) in cros_ec_pwm_set_duty() argument
99 params->duty = duty; in cros_ec_pwm_set_duty()
154 return resp->duty; in cros_ec_pwm_get_duty()
173 * EC doesn't separate the concept of duty cycle and enabled, but in cros_ec_pwm_apply()
196 dev_err(chip->dev, "error getting initial duty: %d\n", ret); in cros_ec_pwm_get_state()
205 * Note that "disabled" and "duty cycle == 0" are treated the same. If in cros_ec_pwm_get_state()
206 * the cached duty cycle is not zero, used the cached duty cycle. This in cros_ec_pwm_get_state()
207 * ensures that the configured duty cycle is kept across a disable and in cros_ec_pwm_get_state()
211 * will be 0 and the actual duty cycle read from the EC is used. in cros_ec_pwm_get_state()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
| D | fanpwm.c | 44 u32 divs, duty; in nvkm_fanpwm_get() local
47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty); in nvkm_fanpwm_get()
49 divs = max(divs, duty); in nvkm_fanpwm_get()
51 duty = divs - duty; in nvkm_fanpwm_get()
52 return (duty * 100) / divs; in nvkm_fanpwm_get()
63 u32 divs, duty; in nvkm_fanpwm_set() local
74 duty = ((divs * percent) + 99) / 100; in nvkm_fanpwm_set()
76 duty = divs - duty; in nvkm_fanpwm_set()
78 ret = therm->func->pwm_set(therm, fan->func.line, divs, duty); in nvkm_fanpwm_set()
91 u32 divs, duty; in nvkm_fanpwm_create() local
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| D | fan.c | 39 int duty; in nvkm_fan_update() local
52 /* check that we're not already at the target duty cycle */ in nvkm_fan_update()
53 duty = fan->get(therm); in nvkm_fan_update()
54 if (duty == target) { in nvkm_fan_update()
60 if (!immediate && duty >= 0) { in nvkm_fan_update()
65 if (duty < target) in nvkm_fan_update()
66 duty = min(duty + 3, target); in nvkm_fan_update()
67 else if (duty > target) in nvkm_fan_update()
68 duty = max(duty - 3, target); in nvkm_fan_update()
70 duty = target; in nvkm_fan_update()
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| D | base.c | 44 u16 duty, i; in nvkm_therm_update_trip() local
59 duty = cur_trip->fan_duty; in nvkm_therm_update_trip()
62 duty = 0; in nvkm_therm_update_trip()
66 return duty; in nvkm_therm_update_trip()
74 u16 duty; in nvkm_therm_compute_linear_duty() local
83 duty = (temp - linear_min_temp); in nvkm_therm_compute_linear_duty()
84 duty *= (therm->fan->bios.max_duty - therm->fan->bios.min_duty); in nvkm_therm_compute_linear_duty()
85 duty /= (linear_max_temp - linear_min_temp); in nvkm_therm_compute_linear_duty()
86 duty += therm->fan->bios.min_duty; in nvkm_therm_compute_linear_duty()
87 return duty; in nvkm_therm_compute_linear_duty()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
| D | fanpwm.c | 44 u32 divs, duty; in nvkm_fanpwm_get() local
47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty); in nvkm_fanpwm_get()
49 divs = max(divs, duty); in nvkm_fanpwm_get()
51 duty = divs - duty; in nvkm_fanpwm_get()
52 return (duty * 100) / divs; in nvkm_fanpwm_get()
63 u32 divs, duty; in nvkm_fanpwm_set() local
74 duty = ((divs * percent) + 99) / 100; in nvkm_fanpwm_set()
76 duty = divs - duty; in nvkm_fanpwm_set()
78 ret = therm->func->pwm_set(therm, fan->func.line, divs, duty); in nvkm_fanpwm_set()
91 u32 divs, duty; in nvkm_fanpwm_create() local
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| D | fan.c | 39 int duty; in nvkm_fan_update() local
52 /* check that we're not already at the target duty cycle */ in nvkm_fan_update()
53 duty = fan->get(therm); in nvkm_fan_update()
54 if (duty == target) { in nvkm_fan_update()
60 if (!immediate && duty >= 0) { in nvkm_fan_update()
65 if (duty < target) in nvkm_fan_update()
66 duty = min(duty + 3, target); in nvkm_fan_update()
67 else if (duty > target) in nvkm_fan_update()
68 duty = max(duty - 3, target); in nvkm_fan_update()
70 duty = target; in nvkm_fan_update()
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| D | base.c | 44 u16 duty, i; in nvkm_therm_update_trip() local
59 duty = cur_trip->fan_duty; in nvkm_therm_update_trip()
62 duty = 0; in nvkm_therm_update_trip()
66 return duty; in nvkm_therm_update_trip()
74 u16 duty; in nvkm_therm_compute_linear_duty() local
83 duty = (temp - linear_min_temp); in nvkm_therm_compute_linear_duty()
84 duty *= (therm->fan->bios.max_duty - therm->fan->bios.min_duty); in nvkm_therm_compute_linear_duty()
85 duty /= (linear_max_temp - linear_min_temp); in nvkm_therm_compute_linear_duty()
86 duty += therm->fan->bios.min_duty; in nvkm_therm_compute_linear_duty()
87 return duty; in nvkm_therm_compute_linear_duty()
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| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-renesas-tpu.c | 78 u16 duty; member
179 tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty); in tpu_pwm_timer_start()
183 pwm->channel, pwm->duty, pwm->period); in tpu_pwm_timer_start()
227 pwm->duty = 0; in tpu_pwm_request()
254 u32 duty; in tpu_pwm_config() local
276 duty = clk_rate / prescalers[prescaler] in tpu_pwm_config()
278 if (duty > period) in tpu_pwm_config()
281 duty = 0; in tpu_pwm_config()
285 "rate %u, prescaler %u, period %u, duty %u\n", in tpu_pwm_config()
286 clk_rate, prescalers[prescaler], period, duty); in tpu_pwm_config()
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| D | pwm-cros-ec.c | 30 * @duty_cycle: cached duty cycle
61 static int cros_ec_pwm_set_duty(struct cros_ec_device *ec, u8 index, u16 duty) in cros_ec_pwm_set_duty() argument
77 params->duty = duty; in cros_ec_pwm_set_duty()
112 return resp->duty; in cros_ec_pwm_get_duty()
128 * EC doesn't separate the concept of duty cycle and enabled, but in cros_ec_pwm_apply()
151 dev_err(chip->dev, "error getting initial duty: %d\n", ret); in cros_ec_pwm_get_state()
160 * Note that "disabled" and "duty cycle == 0" are treated the same. If in cros_ec_pwm_get_state()
161 * the cached duty cycle is not zero, used the cached duty cycle. This in cros_ec_pwm_get_state()
162 * ensures that the configured duty cycle is kept across a disable and in cros_ec_pwm_get_state()
166 * will be 0 and the actual duty cycle read from the EC is used. in cros_ec_pwm_get_state()
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| D | pwm-sprd.c | 74 u32 val, duty, prescale; in sprd_pwm_get_state() local
98 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_get_state()
101 * duty_ns = NSEC_PER_SEC * (prescale + 1) * duty / clk_rate in sprd_pwm_get_state()
109 duty = val & SPRD_PWM_DUTY_MSK; in sprd_pwm_get_state()
110 tmp = (prescale + 1) * NSEC_PER_SEC * duty; in sprd_pwm_get_state()
123 u32 prescale, duty; in sprd_pwm_config() local
129 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_config()
136 duty = duty_ns * SPRD_PWM_MOD_MAX / period_ns; in sprd_pwm_config()
145 * Note: Writing DUTY triggers the hardware to actually apply the in sprd_pwm_config()
146 * values written to MOD and DUTY to the output, so must keep writing in sprd_pwm_config()
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| D | pwm-atmel-tcb.c | 36 unsigned duty; /* PWM duty expressed in clk cycles */ member
96 tcbpwm->duty = 0; in atmel_tcb_pwm_request()
108 tcbpwm->duty = in atmel_tcb_pwm_request()
111 tcbpwm->duty = in atmel_tcb_pwm_request()
153 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_disable()
160 if (tcbpwm->duty == 0) in atmel_tcb_pwm_disable()
212 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_enable()
219 if (tcbpwm->duty == 0) in atmel_tcb_pwm_enable()
245 * If duty is 0 or equal to period there's no need to register in atmel_tcb_pwm_enable()
250 if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) { in atmel_tcb_pwm_enable()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | pwm-regulator.txt | 7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
19 appropriate duty-cycle values. This allows for a much
22 assumption that a %50 duty-cycle value will cause the
33 - voltage-table: Voltage and Duty-Cycle table consisting of 2 cells
35 Second cell is duty-cycle in percent (%)
38 - pwm-dutycycle-unit: Integer value encoding the duty cycle unit. If not
46 Duty cycle values are expressed in pwm-dutycycle-unit.
71 * Inverted PWM logic, and the duty cycle range is limited
85 /* Voltage Duty-Cycle */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | pwm-regulator.yaml | 19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
29 appropriate duty-cycle values. This allows for a much more fine grained
31 make an assumption that a %50 duty-cycle value will cause the regulator
49 description: Voltage and Duty-Cycle table.
54 - description: duty-cycle in percent (%)
63 Integer value encoding the duty cycle unit. If not
75 Duty cycle values are expressed in pwm-dutycycle-unit.
104 * Inverted PWM logic, and the duty cycle range is limited
119 /* Voltage Duty-Cycle */
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| /kernel/linux/linux-6.6/Documentation/hwmon/ |
| D | dme1737.rst | 166 attribute that needs to be set to the maximum attainable RPM (fan at 100% duty-
178 manual mode, the fan speed is set by writing the duty-cycle value to the
180 current duty-cycle as set by the fan controller in the chip. All PWM outputs
191 duty-cycles: full, low, and min. Full is internally hard-wired to 255 (100%)
198 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%)
199 pwm[1-3]_auto_point1_pwm low-speed duty-cycle
200 pwm[1-3]_auto_pwm_min min-speed duty-cycle
208 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm
211 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min
214 duty-cycle. If any of the temperatures rise above the auto_point3_temp value,
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| D | vt1211.rst | 181 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
186 thermal thresholds exist that controls both PWMs output duty-cycles. The
194 PWM Auto Point PWM Output Duty-Cycle
196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
197 pwm[1-2]_auto_point3_pwm high speed duty-cycle
198 pwm[1-2]_auto_point2_pwm low speed duty-cycle
199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
212 PWM output duty-cycle based on the input temperature:
215 Thermal Threshold Output Duty-Cycle Output Duty-Cycle
218 - full speed duty-cycle full speed duty-cycle
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | dme1737.rst | 166 attribute that needs to be set to the maximum attainable RPM (fan at 100% duty-
178 manual mode, the fan speed is set by writing the duty-cycle value to the
180 current duty-cycle as set by the fan controller in the chip. All PWM outputs
191 duty-cycles: full, low, and min. Full is internally hard-wired to 255 (100%)
198 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%)
199 pwm[1-3]_auto_point1_pwm low-speed duty-cycle
200 pwm[1-3]_auto_pwm_min min-speed duty-cycle
208 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm
211 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min
214 duty-cycle. If any of the temperatures rise above the auto_point3_temp value,
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| D | vt1211.rst | 181 Each PWM has 4 associated distinct output duty-cycles: full, high, low and
186 thermal thresholds exist that controls both PWMs output duty-cycles. The
194 PWM Auto Point PWM Output Duty-Cycle
196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255)
197 pwm[1-2]_auto_point3_pwm high speed duty-cycle
198 pwm[1-2]_auto_point2_pwm low speed duty-cycle
199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0)
212 PWM output duty-cycle based on the input temperature:
215 Thermal Threshold Output Duty-Cycle Output Duty-Cycle
218 - full speed duty-cycle full speed duty-cycle
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/ |
| D | pwm-vibrator.yaml | 14 strength increases based on the duty cycle of the enable PWM channel
15 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
18 driven at fixed duty cycle. If available this is can be used to increase
39 direction-duty-cycle-ns:
41 Duty cycle of the direction PWM channel in nanoseconds,
58 direction-duty-cycle-ns = <1000000000>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/ |
| D | pwm-vibrator.txt | 4 strength increases based on the duty cycle of the enable PWM channel
5 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
8 driven at fixed duty cycle. If available this is can be used to increase
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
64 direction-duty-cycle-ns = <1000000000>;
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| /kernel/linux/linux-5.10/include/trace/events/ |
| D | clk.h | 189 TP_PROTO(struct clk_core *core, struct clk_duty *duty),
191 TP_ARGS(core, duty),
201 __entry->num = duty->num;
202 __entry->den = duty->den;
211 TP_PROTO(struct clk_core *core, struct clk_duty *duty),
213 TP_ARGS(core, duty)
218 TP_PROTO(struct clk_core *core, struct clk_duty *duty),
220 TP_ARGS(core, duty)
|