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/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi-gp-audio.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * dw-hdmi-gp-audio.c
5 * Copyright 2020-2022 NXP
12 #include <linux/dma-mapping.h>
17 #include <sound/hdmi-codec.h>
26 #include "dw-hdmi-audio.h"
28 #define DRIVER_NAME "dw-hdmi-gp-audio"
29 #define DRV_NAME "hdmi-gp-audio"
43 * The default mapping of ALSA channels to HDMI channels and speaker
44 * allocation bits. Note that we can't do channel remapping here -
[all …]
Ddw-hdmi-ahb-audio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * DesignWare HDMI audio driver
5 * Written and tested against the Designware HDMI Tx found in iMX6.
21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
84 * The default mapping of ALSA channels to HDMI channels and speaker
85 * allocation bits. Note that we can't do channel remapping here -
88 * Mappings for alsa-lib pcm/surround*.conf files:
93 * Our mapping from ALSA channel to CEA686D speaker name and HDMI channel:
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
3 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
4 obj-$(CONFIG_DRM_DW_HDMI_GP_AUDIO) += dw-hdmi-gp-audio.o
5 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
6 obj-$(CONFIG_DRM_DW_HDMI_CEC) += dw-hdmi-cec.o
8 obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o
Ddw-hdmi-i2s-audio.c1 // SPDX-License-Identifier: GPL-2.0
3 * dw-hdmi-i2s-audio.c
9 #include <linux/dma-mapping.h>
15 #include <sound/hdmi-codec.h>
17 #include "dw-hdmi.h"
18 #include "dw-hdmi-audio.h"
20 #define DRIVER_NAME "dw-hdmi-i2s-audio"
25 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_write() local
27 audio->write(hdmi, val, offset); in hdmi_write()
32 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_read() local
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Ddw-hdmi-cec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware HDMI CEC driver
5 * Copyright (C) 2015-2017 Russell King.
17 #include <media/cec-notifier.h>
19 #include "dw-hdmi-cec.h"
55 struct dw_hdmi *hdmi; member
73 cec->ops->write(cec->hdmi, val, offset); in dw_hdmi_write()
78 return cec->ops->read(cec->hdmi, offset); in dw_hdmi_read()
86 cec->addresses = 0; in dw_hdmi_cec_log_addr()
88 cec->addresses |= BIT(logical_addr) | BIT(15); in dw_hdmi_cec_log_addr()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi-ahb-audio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * DesignWare HDMI audio driver
5 * Written and tested against the Designware HDMI Tx found in iMX6.
21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
84 * The default mapping of ALSA channels to HDMI channels and speaker
85 * allocation bits. Note that we can't do channel remapping here -
88 * Mappings for alsa-lib pcm/surround*.conf files:
93 * Our mapping from ALSA channel to CEA686D speaker name and HDMI channel:
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
3 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
4 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
5 obj-$(CONFIG_DRM_DW_HDMI_CEC) += dw-hdmi-cec.o
7 obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o
Ddw-hdmi-i2s-audio.c1 // SPDX-License-Identifier: GPL-2.0
3 * dw-hdmi-i2s-audio.c
9 #include <linux/dma-mapping.h>
15 #include <sound/hdmi-codec.h>
17 #include "dw-hdmi.h"
18 #include "dw-hdmi-audio.h"
20 #define DRIVER_NAME "dw-hdmi-i2s-audio"
25 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_write() local
27 audio->write(hdmi, val, offset); in hdmi_write()
32 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_read() local
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Ddw-hdmi-cec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware HDMI CEC driver
5 * Copyright (C) 2015-2017 Russell King.
17 #include <media/cec-notifier.h>
19 #include "dw-hdmi-cec.h"
55 struct dw_hdmi *hdmi; member
69 cec->ops->write(cec->hdmi, val, offset); in dw_hdmi_write()
74 return cec->ops->read(cec->hdmi, offset); in dw_hdmi_read()
82 cec->addresses = 0; in dw_hdmi_cec_log_addr()
84 cec->addresses |= BIT(logical_addr) | BIT(15); in dw_hdmi_cec_log_addr()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: /schemas/sound/name-prefix.yaml#
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
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Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
16 the following device-specific properties.
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: /schemas/sound/dai-common.yaml#
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
[all …]
Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/rockchip/
Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DWC HDMI TX Encoder
10 - Mark Yao <markyao0591@gmail.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Ddw_hdmi-rockchip.txt1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
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/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
36 * DOC: HDMI Output
38 * HDMI Output is composed of :
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
47 * | HDMI TOP |<= HPD
50 * | Synopsys HDMI | HDMI PHY |=> TMDS
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/kernel/linux/linux-6.6/drivers/gpu/drm/ingenic/
Dingenic-dw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
5 * Derived from dw_hdmi-imx.c with i.MX portions removed.
47 ingenic_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, in ingenic_dw_hdmi_mode_valid() argument
51 if (mode->clock < 13500) in ingenic_dw_hdmi_mode_valid()
54 if (mode->clock > 216000) in ingenic_dw_hdmi_mode_valid()
69 { .compatible = "ingenic,jz4780-dw-hdmi" },
76 struct dw_hdmi *hdmi = (struct dw_hdmi *)data; in ingenic_dw_hdmi_cleanup() local
78 dw_hdmi_remove(hdmi); in ingenic_dw_hdmi_cleanup()
83 struct dw_hdmi *hdmi; in ingenic_dw_hdmi_probe() local
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dingenic,jz4780-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ingenic,jz4780-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic JZ4780 HDMI Transmitter
10 - H. Nikolaus Schaller <hns@goldelico.com>
13 The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4
17 - $ref: synopsys,dw-hdmi.yaml#
21 const: ingenic,jz4780-dw-hdmi
23 reg-io-width:
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Drenesas,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
22 - enum:
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
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/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #include <linux/media-bus-format.h>
34 #define DRIVER_NAME "meson-dw-hdmi"
35 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
38 * DOC: HDMI Output
40 * HDMI Output is composed of :
42 * - A Synopsys DesignWare HDMI Controller IP
43 * - A TOP control block controlling the Clocks and PHY
44 * - A custom HDMI PHY in order convert video to TMDS signal
49 * | HDMI TOP |<= HPD
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/sun4i/
Dsun8i_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); in sun8i_dw_hdmi_encoder_mode_set() local
24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); in sun8i_dw_hdmi_encoder_mode_set()
33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_a83t() argument
37 if (mode->clock > 297000) in sun8i_dw_hdmi_mode_valid_a83t()
44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_h6() argument
52 if (mode->clock > 594000) in sun8i_dw_hdmi_mode_valid_h6()
70 remote = of_graph_get_remote_node(node, 0, -1); in sun8i_dw_hdmi_find_possible_crtcs()
104 struct sun8i_dw_hdmi *hdmi; in sun8i_dw_hdmi_bind() local
107 if (!pdev->dev.of_node) in sun8i_dw_hdmi_bind()
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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun8i_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); in sun8i_dw_hdmi_encoder_mode_set() local
24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); in sun8i_dw_hdmi_encoder_mode_set()
33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_a83t() argument
37 if (mode->clock > 297000) in sun8i_dw_hdmi_mode_valid_a83t()
44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_h6() argument
52 if (mode->clock > 594000) in sun8i_dw_hdmi_mode_valid_h6()
70 remote = of_graph_get_remote_node(node, 0, -1); in sun8i_dw_hdmi_find_possible_crtcs()
102 remote = of_graph_get_remote_node(dev->of_node, 1, -1); in sun8i_dw_hdmi_find_connector_pdev()
104 return -ENODEV; in sun8i_dw_hdmi_find_connector_pdev()
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/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
40 bool "Rockchip specific extensions for Synopsys DW HDMI"
43 for the Synopsys DesignWare HDMI driver. If you want to
44 enable HDMI on RK3288 or RK3399 based SoC, you should select
48 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
52 for the Synopsys DesignWare HDMI driver. If you want to
57 bool "Rockchip specific extensions for Innosilicon HDMI"
60 for the Innosilicon HDMI driver. If you want to enable
61 HDMI on RK3036 based SoC, you should select this option.
84 bool "Rockchip specific extensions for RK3066 HDMI"
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/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
59 bool "Rockchip specific extensions for Synopsys DW HDMI"
62 for the Synopsys DesignWare HDMI driver. If you want to
63 enable HDMI on RK3288 or RK3399 based SoC, you should select
67 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
76 bool "Rockchip specific extensions for Innosilicon HDMI"
79 for the Innosilicon HDMI driver. If you want to enable
80 HDMI on RK3036 based SoC, you should select this option.
103 bool "Rockchip specific extensions for RK3066 HDMI"
107 for the RK3066 HDMI driver. If you want to enable
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/kernel/linux/linux-5.10/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
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