| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 48 clkout1, clkout2, mdio, dfe led0, dfe led1, ephy led0, ephy led1, ephy led2
51 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
101 spi, usif, cgu, exin, stp, ebu, mdio, dfe, ephy
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| D | mediatek,mt7620-pinctrl.yaml | 38 enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand,
56 const: ephy
60 enum: [ephy]
69 enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi,
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 75 clkout1, clkout2, mdio, dfe led0, dfe led1, ephy led0, ephy led1, ephy led2
78 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
128 spi, usif, cgu, exin, stp, ebu, mdio, dfe, ephy
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| /kernel/linux/linux-6.6/drivers/pinctrl/ |
| D | pinctrl-xway.c | 117 MFP_XWAY(GPIO2, GPIO, STP, DFE, EPHY),
118 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
119 MFP_XWAY(GPIO4, GPIO, GPT, EPHY, MII),
204 GRP_MUX("ephy led0", EPHY, ase_pins_ephy_led0),
205 GRP_MUX("ephy led1", EPHY, ase_pins_ephy_led1),
206 GRP_MUX("ephy led2", EPHY, ase_pins_ephy_led2),
215 static const char * const ase_ephy_grps[] = {"ephy led0", "ephy led1",
216 "ephy led2"};
234 {"ephy", ARRAY_AND_SIZE(ase_ephy_grps)},
887 MFP_XWAY(GPIO0, GPIO, EXIN, EPHY, NONE),
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6328.yaml | 125 /* BCM6328 with 4 EPHY LEDs */
267 /* BCM6362 with 1 LED for each EPHY */
340 ephy@4 {
355 /* BCM6362 with EPHY LEDs swapped */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6328.txt | 73 Scenario 1 : BCM6328 with 4 EPHY LEDs
195 Scenario 3 : BCM6362 with 1 LED for each EPHY
261 ephy@4 {
275 Scenario 5 : BCM6362 with EPHY LEDs swapped
|
| /kernel/linux/linux-6.6/arch/mips/bcm63xx/ |
| D | clk.c | 428 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
458 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
472 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
486 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
502 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
|
| /kernel/linux/linux-5.10/arch/mips/bcm63xx/ |
| D | clk.c | 428 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
458 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
472 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
486 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
502 CLKDEV_INIT(NULL, "ephy", &clk_ephy),
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/ |
| D | b44.h | 11 #define DEVCTRL_IPP 0x00000400 /* Internal EPHY Present */
12 #define DEVCTRL_EPR 0x00008000 /* EPHY Reset */
60 #define MAC_CTRL_PHY_PDOWN 0x00000004 /* Onchip EPHY Powerdown */
61 #define MAC_CTRL_PHY_EDET 0x00000008 /* Onchip EPHY Energy Detected */
62 #define MAC_CTRL_PHY_LEDCTRL 0x000000e0 /* Onchip EPHY LED Control */
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/ |
| D | b44.h | 11 #define DEVCTRL_IPP 0x00000400 /* Internal EPHY Present */
12 #define DEVCTRL_EPR 0x00008000 /* EPHY Reset */
60 #define MAC_CTRL_PHY_PDOWN 0x00000004 /* Onchip EPHY Powerdown */
61 #define MAC_CTRL_PHY_EDET 0x00000008 /* Onchip EPHY Energy Detected */
62 #define MAC_CTRL_PHY_LEDCTRL 0x000000e0 /* Onchip EPHY LED Control */
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-xway.c | 354 MFP_XWAY(GPIO2, GPIO, STP, DFE, EPHY),
355 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
356 MFP_XWAY(GPIO4, GPIO, GPT, EPHY, MII),
441 GRP_MUX("ephy led0", EPHY, ase_pins_ephy_led0),
442 GRP_MUX("ephy led1", EPHY, ase_pins_ephy_led1),
443 GRP_MUX("ephy led2", EPHY, ase_pins_ephy_led2),
452 static const char * const ase_ephy_grps[] = {"ephy led0", "ephy led1",
453 "ephy led2"};
471 {"ephy", ARRAY_AND_SIZE(ase_ephy_grps)},
1124 MFP_XWAY(GPIO0, GPIO, EXIN, EPHY, NONE),
[all …]
|
| /kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt7620.c | 64 static struct mtmips_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
108 GRP("ephy", ephy_grp, 1, MT7620_GPIO_MODE_EPHY),
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-sun8i.c | 62 * @ephy_clk: reference to the optional EPHY clock for the internal PHY
64 * @rst_ephy: reference to the optional EPHY reset for the internal PHY
260 /* H3 specific bits for EPHY */
837 /* Make sure the EPHY is properly reseted, as U-Boot may leave in sun8i_dwmac_power_internal_phy()
840 * This assumes the driver has exclusive access to the EPHY reset. in sun8i_dwmac_power_internal_phy()
958 /* Force EPHY xtal frequency to 24MHz. */ in sun8i_dwmac_set_syscon()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-sun8i.c | 61 * @ephy_clk: reference to the optional EPHY clock for the internal PHY
63 * @rst_ephy: reference to the optional EPHY reset for the internal PHY
244 /* H3 specific bits for EPHY */
806 /* Make sure the EPHY is properly reseted, as U-Boot may leave in sun8i_dwmac_power_internal_phy()
928 /* Force EPHY xtal frequency to 24MHz. */ in sun8i_dwmac_set_syscon()
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/ |
| D | sun8i-a83t-cubietruck-plus.dts | 361 regulator-name = "ephy-io";
373 regulator-name = "ephy";
|
| D | sun8i-s3-pinecube.dts | 169 regulator-name = "vdd-sys-cpu-ephy";
|
| /kernel/linux/linux-6.6/drivers/clk/bcm/ |
| D | clk-bcm63xx-gate.c | 79 .name = "ephy",
280 .name = "ephy",
|
| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | clk-bcm63xx-gate.c | 80 .name = "ephy",
281 .name = "ephy",
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sun8i-a83t-cubietruck-plus.dts | 361 regulator-name = "ephy-io";
373 regulator-name = "ephy";
|
| D | mt7629-rfb.dts | 160 ephy_leds_pins: ephy-leds-pins {
|
| D | sun8i-s3-pinecube.dts | 176 regulator-name = "vdd-sys-cpu-ephy";
|
| /kernel/linux/linux-6.6/drivers/net/phy/ |
| D | rockchip.c | 177 .name = "Rockchip integrated EPHY",
|
| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | rockchip.c | 177 .name = "Rockchip integrated EPHY",
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/ |
| D | mt7629-rfb.dts | 161 ephy_leds_pins: ephy-leds-pins {
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | allwinner,sun8i-a83t-emac.yaml | 119 EPHY LEDs are active low.
|