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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/samsung/
Dsamsung,exynos5433-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5433 SoC Display and Enhancement Controller (DECON)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 DECON (Display and Enhancement Controller) is the Display Controller for the
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Dsamsung,exynos5433-mic.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-mic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5433 SoC Mobile Image Compressor (MIC)
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
16 MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/exynos/
Dexynos5433-decon.txt1 Device-Tree bindings for Samsung Exynos SoC display controller (DECON)
3 DECON (Display and Enhancement Controller) is the Display Controller for the
8 - compatible: value should be one of:
9 "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv";
10 - reg: physical base address and length of the DECON registers set.
11 - interrupt-names: should contain the interrupt names depending on mode of work:
15 - interrupts or interrupts-extended: list of interrupt specifiers corresponding
16 to names privided in interrupt-names, as described in
17 interrupt-controller/interrupts.txt
18 - clocks: must include clock specifiers corresponding to entries in the
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Dexynos-mic.txt1 Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
3 MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi is
4 not capable to transfer high resoltuion frame data as decon can send. MIC
10 - compatible: value should be "samsung,exynos5433-mic".
11 - reg: physical base address and length of the MIC registers set and system
13 - clocks: must include clock specifiers corresponding to entries in the
14 clock-names property.
15 - clock-names: list of clock names sorted in the same order as the clocks
17 - samsung,disp-syscon: the reference node for syscon for DISP block.
18 - ports: contains a port which is connected to decon node and dsi node.
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/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 bool "DECON on Exynos5433"
28 Choose this option if you want to use Exynos5433 DECON for DRM.
31 bool "DECON on Exynos7"
34 Choose this option if you want to use Exynos DECON for DRM.
57 bool "MIPI-DSI host"
63 This enables support for Exynos MIPI-DSI device.
87 comment "Sub-drivers"
Dregs-decon5433.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 /* Exynos543X DECON */
30 #define DECON_WxKEYCON0(n) (0x0230 + ((n - 1) * 8))
31 #define DECON_WxKEYCON1(n) (0x0234 + ((n - 1) * 8))
32 #define DECON_WxKEYALPHA(n) (0x0250 + ((n - 1) * 4))
37 #define DECON_BLENDERQx(n) (0x0300 + ((n - 1) * 4))
60 /* Exynos5430 DECON */
64 /* Exynos5433 DECON */
70 /* Exynos543X DECON Internal */
76 /* Exynos543X DECON TV */
Dexynos5433_drm_decon.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include "regs-decon5433.h"
98 val = (val & mask) | (readl(ctx->addr + reg) & ~mask); in decon_set_bits()
99 writel(val, ctx->addr + reg); in decon_set_bits()
104 struct decon_context *ctx = crtc->ctx; in decon_enable_vblank()
108 if (crtc->i80_mode) in decon_enable_vblank()
113 writel(val, ctx->addr + DECON_VIDINTCON0); in decon_enable_vblank()
115 enable_irq(ctx->irq); in decon_enable_vblank()
116 if (!(ctx->out_type & I80_HW_TRG)) in decon_enable_vblank()
117 enable_irq(ctx->te_irq); in decon_enable_vblank()
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/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
28 bool "DECON on Exynos5433"
30 Choose this option if you want to use Exynos5433 DECON for DRM.
33 bool "DECON on Exynos7"
36 Choose this option if you want to use Exynos DECON for DRM.
59 bool "MIPI-DSI host"
66 This enables support for Exynos MIPI-DSI device.
91 comment "Sub-drivers"
Dregs-decon5433.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 /* Exynos543X DECON */
30 #define DECON_WxKEYCON0(n) (0x0230 + ((n - 1) * 8))
31 #define DECON_WxKEYCON1(n) (0x0234 + ((n - 1) * 8))
32 #define DECON_WxKEYALPHA(n) (0x0250 + ((n - 1) * 4))
37 #define DECON_BLENDERQx(n) (0x0300 + ((n - 1) * 4))
60 /* Exynos5430 DECON */
64 /* Exynos5433 DECON */
70 /* Exynos543X DECON Internal */
76 /* Exynos543X DECON TV */
Dexynos5433_drm_decon.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "regs-decon5433.h"
99 val = (val & mask) | (readl(ctx->addr + reg) & ~mask); in decon_set_bits()
100 writel(val, ctx->addr + reg); in decon_set_bits()
105 struct decon_context *ctx = crtc->ctx; in decon_enable_vblank()
109 if (crtc->i80_mode) in decon_enable_vblank()
114 writel(val, ctx->addr + DECON_VIDINTCON0); in decon_enable_vblank()
116 enable_irq(ctx->irq); in decon_enable_vblank()
117 if (!(ctx->out_type & I80_HW_TRG)) in decon_enable_vblank()
118 enable_irq(ctx->te_irq); in decon_enable_vblank()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5433 SoC device tree source
7 * Samsung's Exynos5433 SoC device nodes are listed in this file.
8 * Exynos5433 based board files can include this file and provide
12 * Exynos5433 SoC. As device tree coverage for Exynos5433 increases,
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 compatible = "samsung,exynos5433";
21 #address-cells = <2>;
22 #size-cells = <2>;
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Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5433 TM2 board device tree source
8 * which are based on Samsung Exynos5433 SoC.
11 /dts-v1/;
12 #include "exynos5433.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dsamsung,exynos5433-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynos5433-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5433 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5433 SoC device tree source
7 * Samsung's Exynos5433 SoC device nodes are listed in this file.
8 * Exynos5433 based board files can include this file and provide
12 * Exynos5433 SoC. As device tree coverage for Exynos5433 increases,
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 compatible = "samsung,exynos5433";
21 #address-cells = <2>;
22 #size-cells = <2>;
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Dexynos5433-tm2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5433 TM2 board device tree source
8 * which are based on Samsung Exynos5433 SoC.
11 /dts-v1/;
12 #include "exynos5433.dtsi"
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/sound/samsung-i2s.h>
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dexynos5433-clock.txt1 * Samsung Exynos5433 CMU (Clock Management Units)
3 The Exynos5433 clock controller generates and supplies clock to various
4 controllers within the Exynos5433 SoC.
8 - compatible: should be one of the following.
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
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