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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dsamsung,ufs-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC series UFS PHY
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 "#phy-cells":
18 - samsung,exynos7-ufs-phy
19 - samsung,exynosautov9-ufs-phy
20 - tesla,fsd-ufs-phy
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ufs/
Dsamsung,exynos-ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC series UFS host controller
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 Each Samsung UFS host controller instance should have its own node.
16 - $ref: ufs-common.yaml
21 - samsung,exynos7-ufs
22 - samsung,exynosautov9-ufs
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dsamsung,ufs-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC series UFS PHY Device Tree Bindings
10 - Alim Akhtar <alim.akhtar@samsung.com>
13 "#phy-cells":
18 - samsung,exynos7-ufs-phy
23 reg-names:
25 - const: phy-pma
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 SoC device tree source
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "samsung,exynos7";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
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Dexynos7-espresso.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 Espresso board device tree source
9 /dts-v1/;
10 #include "exynos7.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Samsung Exynos7 Espresso board based on Exynos7";
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
26 stdout-path = &serial_2;
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Dexynos7-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
12 #include <dt-bindings/pinctrl/samsung.h>
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 interrupt-parent = <&gic>;
21 #interrupt-cells = <2>;
33 gpio-controller;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 SoC device tree source
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "samsung,exynos7";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
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Dexynos7-espresso.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7 Espresso board device tree source
9 /dts-v1/;
10 #include "exynos7.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Samsung Exynos7 Espresso board based on Exynos7";
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
26 stdout-path = &serial_2;
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Dexynos7-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 interrupt-parent = <&gic>;
21 #interrupt-cells = <2>;
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Dexynosautov9.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynosautov9.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/soc/samsung,boot-mode.h>
12 #include <dt-bindings/soc/samsung,exynos-usi.h>
16 #address-cells = <2>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
31 arm-pmu {
32 compatible = "arm,cortex-a76-pmu";
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/kernel/linux/linux-6.6/drivers/phy/samsung/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
3 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
4 obj-$(CONFIG_PHY_EXYNOS_PCIE) += phy-exynos-pcie.o
5 obj-$(CONFIG_PHY_SAMSUNG_UFS) += phy-exynos-ufs.o
6 phy-exynos-ufs-y += phy-samsung-ufs.o
7 phy-exynos-ufs-y += phy-exynos7-ufs.o
8 phy-exynos-ufs-y += phy-exynosautov9-ufs.o
9 phy-exynos-ufs-y += phy-fsd-ufs.o
10 obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o
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Dphy-exynos7-ufs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UFS PHY driver data for Samsung EXYNOS7 SoC
8 #include "phy-samsung-ufs.h"
Dphy-samsung-ufs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UFS PHY driver for Samsung SoC
22 #include "phy-samsung-ufs.h"
25 for (i = 0; i < (phy)->lane_cnt; i++)
27 for (; (cfg)->id; (cfg)++)
39 writel(cfg->val, (phy)->reg_pma + cfg->off_0); in samsung_ufs_phy_config()
42 if (cfg->id == PHY_TRSV_BLK) in samsung_ufs_phy_config()
43 writel(cfg->val, (phy)->reg_pma + cfg->off_1); in samsung_ufs_phy_config()
57 ufs_phy->reg_pma + PHY_APB_ADDR(PHY_PLL_LOCK_STATUS), in samsung_ufs_phy_wait_for_lock_acq()
60 dev_err(ufs_phy->dev, in samsung_ufs_phy_wait_for_lock_acq()
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/tesla/
Dfsd.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Tesla Full Self-Driving SoC device tree source
5 * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2017-2022 Tesla, Inc.
11 #include <dt-bindings/clock/fsd-clk.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
38 #address-cells = <2>;
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/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-samsung-ufs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * UFS PHY driver for Samsung EXYNOS SoC
35 /* UFS PHY registers */
133 regmap_update_bits(phy->reg_pmu, phy->isol->offset, in samsung_ufs_phy_ctrl_isol()
134 phy->isol->mask, isol ? 0 : phy->isol->en); in samsung_ufs_phy_ctrl_isol()
137 #include "phy-exynos7-ufs.h"
Dphy-exynos7-ufs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * UFS PHY driver data for Samsung EXYNOS7 SoC
10 #include "phy-samsung-ufs.h"
Dphy-samsung-ufs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UFS PHY driver for Samsung SoC
22 #include "phy-samsung-ufs.h"
25 for (i = 0; i < (phy)->lane_cnt; i++)
27 for (; (cfg)->id; (cfg)++)
39 writel(cfg->val, (phy)->reg_pma + cfg->off_0); in samsung_ufs_phy_config()
42 if (cfg->id == PHY_TRSV_BLK) in samsung_ufs_phy_config()
43 writel(cfg->val, (phy)->reg_pma + cfg->off_1); in samsung_ufs_phy_config()
57 ufs_phy->reg_pma + PHY_APB_ADDR(PHY_PLL_LOCK_STATUS), in samsung_ufs_phy_wait_for_lock_acq()
60 dev_err(ufs_phy->dev, in samsung_ufs_phy_wait_for_lock_acq()
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/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufs-exynos.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UFS Host Controller driver for Exynos specific extensions
5 * Copyright (C) 2014-2015 Samsung Electronics Co., Ltd.
19 #include "ufshcd-pltfrm.h"
23 #include "ufs-exynos.h"
99 * UFS Protector registers
110 static void exynos_ufs_auto_ctrl_hcc(struct exynos_ufs *ufs, bool en);
111 static void exynos_ufs_ctrl_clkstop(struct exynos_ufs *ufs, bool en);
113 static inline void exynos_ufs_enable_auto_ctrl_hcc(struct exynos_ufs *ufs) in exynos_ufs_enable_auto_ctrl_hcc() argument
115 exynos_ufs_auto_ctrl_hcc(ufs, true); in exynos_ufs_enable_auto_ctrl_hcc()
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/kernel/linux/linux-6.6/drivers/ufs/host/
Dufs-exynos.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * UFS Host Controller driver for Exynos specific extensions
5 * Copyright (C) 2014-2015 Samsung Electronics Co., Ltd.
21 #include <ufs/ufshcd.h>
22 #include "ufshcd-pltfrm.h"
23 #include <ufs/ufshci.h>
24 #include <ufs/unipro.h>
26 #include "ufs-exynos.h"
82 /* FSYS UFS Shareability */
88 /* Multi-host registers */
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