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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dhisilicon,hi3660-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon System Reset Controller
10 - Wei Xu <xuwei5@hisilicon.com>
13 Please also refer to reset.txt in this directory for common reset
15 The reset controller registers are part of the system-ctl block on
16 hi3660 and hi3670 SoCs.
21 - items:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dhisilicon,hi3660-reset.txt1 Hisilicon System Reset Controller
4 Please also refer to reset.txt in this directory for common reset
7 The reset controller registers are part of the system-ctl block on
8 hi3660 and hi3670 SoCs.
11 - compatible: should be one of the following:
12 "hisilicon,hi3660-reset" for HI3660
13 "hisilicon,hi3670-reset", "hisilicon,hi3660-reset" for HI3670
14 - hisi,rst-syscon: phandle of the reset's syscon.
15 - #reset-cells : Specifies the number of cells needed to encode a
16 reset source. The type shall be a <u32> and the value shall be 2.
[all …]
/kernel/linux/linux-5.10/drivers/reset/hisilicon/
Dreset-hi3660.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2016-2017 Linaro Ltd.
4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
12 #include <linux/reset-controller.h>
30 return regmap_write(rc->map, offset, mask); in hi3660_reset_program_hw()
32 return regmap_write(rc->map, offset + 4, mask); in hi3660_reset_program_hw()
60 .reset = hi3660_reset_dev,
70 offset = reset_spec->args[0]; in hi3660_reset_xlate()
71 bit = reset_spec->args[1]; in hi3660_reset_xlate()
79 struct device_node *np = pdev->dev.of_node; in hi3660_reset_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Hi3660 Reset Driver"
7 Build the Hisilicon Hi3660 reset driver.
10 tristate "Hi6220 Reset Driver"
14 Build the Hisilicon Hi6220 reset driver.
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_COMMON_RESET_HI6220) += hi6220_reset.o
3 obj-$(CONFIG_COMMON_RESET_HI3660) += reset-hi3660.o
/kernel/linux/linux-5.10/drivers/clk/hisilicon/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
19 bool "Hi3660 Clock Driver"
23 Build the clock driver for hi3660.
48 bool "HiSilicon Reset Controller Driver"
52 Build reset controller driver for HiSilicon device chipsets.
63 bool "Hi3660 Stub Clock Driver" if EXPERT
68 Build the Hisilicon Hi3660 stub clock driver.
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
8 obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
9 obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
10 obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
11 obj-$(CONFIG_COMMON_CLK_HI3516CV300) += crg-hi3516cv300.o
12 obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o
13 obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
14 obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
15 obj-$(CONFIG_COMMON_CLK_HI3798CV200) += crg-hi3798cv200.o
[all …]
/kernel/linux/linux-6.6/drivers/clk/hisilicon/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 bool "Hi3660 Clock Driver"
31 Build the clock driver for hi3660.
56 bool "HiSilicon Reset Controller Driver"
60 Build reset controller driver for HiSilicon device chipsets.
71 bool "Hi3660 Stub Clock Driver" if EXPERT
76 Build the Hisilicon Hi3660 stub clock driver.
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
8 obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
9 obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
10 obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
11 obj-$(CONFIG_COMMON_CLK_HI3516CV300) += crg-hi3516cv300.o
12 obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o
13 obj-$(CONFIG_COMMON_CLK_HI3559A) += clk-hi3559a.o
14 obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
15 obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
[all …]
/kernel/linux/linux-6.6/drivers/reset/hisilicon/
Dreset-hi3660.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2016-2017 Linaro Ltd.
4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
12 #include <linux/reset-controller.h>
30 return regmap_write(rc->map, offset, mask); in hi3660_reset_program_hw()
32 return regmap_write(rc->map, offset + 4, mask); in hi3660_reset_program_hw()
60 .reset = hi3660_reset_dev,
70 offset = reset_spec->args[0]; in hi3660_reset_xlate()
71 bit = reset_spec->args[1]; in hi3660_reset_xlate()
79 struct device_node *np = pdev->dev.of_node; in hi3660_reset_probe()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Hi3660 Reset Driver"
7 Build the Hisilicon Hi3660 reset driver.
10 tristate "Hi6220 Reset Driver"
14 Build the Hisilicon Hi6220 reset driver.
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_COMMON_RESET_HI6220) += hi6220_reset.o
3 obj-$(CONFIG_COMMON_RESET_HI3660) += reset-hi3660.o
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ufs/
Dufs-hisi.txt3 UFS nodes are defined to describe on-chip UFS hardware macro.
7 - compatible : compatible list, contains one of the following -
8 "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
9 host controller present on Hi3660 chipset.
10 "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
12 - reg : should contain UFS register address space & UFS SYS CTRL register address,
13 - interrupts : interrupt number
14 - clocks : List of phandle and clock specifier pairs
15 - clock-names : List of clock input name strings sorted in the same
17 - freq-table-hz : Array of <min max> operating frequencies stored in the same
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Hisilicon Hi3660 SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "hisilicon,hi3660";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
[all …]
Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
[all …]
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hi3660.dtsi"
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Hisilicon Hi3660 SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "hisilicon,hi3660";
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
[all …]
Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
[all …]
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hi3660.dtsi"
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ufs/
Dhisilicon,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - hisilicon,hi3660-ufs
19 - hisilicon,hi3670-ufs
21 - compatible
24 - $ref: ufs-common.yaml
29 - items:
30 - const: hisilicon,hi3660-ufs
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dhisilicon,kirin-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/hisilicon,kirin-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiaowei Song <songxiaowei@hisilicon.com>
11 - Binghui Wang <wangbinghui@hisilicon.com>
17 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
20 - $ref: /schemas/pci/snps,dw-pcie.yaml#
26 - hisilicon,kirin960-pcie
27 - hisilicon,kirin970-pcie
[all …]
/kernel/linux/linux-5.10/drivers/pci/controller/dwc/
Dpcie-kirin.c1 // SPDX-License-Identifier: GPL-2.0
27 #include "pcie-designware.h"
29 #define to_kirin_pcie(x) dev_get_drvdata((x)->dev)
99 writel(val, kirin_pcie->apb_base + reg); in kirin_apb_ctrl_writel()
104 return readl(kirin_pcie->apb_base + reg); in kirin_apb_ctrl_readl()
111 writel(val, kirin_pcie->phy_base + reg); in kirin_apb_phy_writel()
116 return readl(kirin_pcie->phy_base + reg); in kirin_apb_phy_readl()
122 struct device *dev = &pdev->dev; in kirin_pcie_get_clk()
124 kirin_pcie->phy_ref_clk = devm_clk_get(dev, "pcie_phy_ref"); in kirin_pcie_get_clk()
125 if (IS_ERR(kirin_pcie->phy_ref_clk)) in kirin_pcie_get_clk()
[all …]
/kernel/linux/linux-5.10/drivers/scsi/ufs/
Dufs-hisi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2016-2017 Linaro Ltd.
6 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
12 #include <linux/dma-mapping.h>
14 #include <linux/reset.h>
17 #include "ufshcd-pltfrm.h"
19 #include "ufs-hisi.h"
55 dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n", in ufs_hisi_check_hibern8()
59 err = -1; in ufs_hisi_check_hibern8()
60 dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n", in ufs_hisi_check_hibern8()
[all …]
/kernel/linux/linux-6.6/drivers/ufs/host/
Dufs-hisi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2016-2017 Linaro Ltd.
6 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
14 #include <linux/dma-mapping.h>
16 #include <linux/reset.h>
19 #include "ufshcd-pltfrm.h"
21 #include "ufs-hisi.h"
57 dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n", in ufs_hisi_check_hibern8()
61 err = -1; in ufs_hisi_check_hibern8()
62 dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n", in ufs_hisi_check_hibern8()
[all …]
/kernel/linux/linux-6.6/drivers/pci/controller/dwc/
Dpcie-kirin.c1 // SPDX-License-Identifier: GPL-2.0
29 #include "pcie-designware.h"
31 #define to_kirin_pcie(x) dev_get_drvdata((x)->dev)
60 * in-board Ethernet adapter and the other two connected to M.2 and mini
83 /* Per-slot PERST# */
88 /* Per-slot clkreq */
142 writel(val, hi3660_pcie_phy->base + reg); in kirin_apb_phy_writel()
148 return readl(hi3660_pcie_phy->base + reg); in kirin_apb_phy_readl()
153 struct device *dev = phy->dev; in hi3660_pcie_phy_get_clk()
155 phy->phy_ref_clk = devm_clk_get(dev, "pcie_phy_ref"); in hi3660_pcie_phy_get_clk()
[all …]

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