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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
14 model to control the clock gates for the peripherals. An LPCG module
24 include/dt-bindings/clock/imx8-lpcg.h
29 - const: fsl,imx8qxp-lpcg
[all …]
Dfsl,imx8-acm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,imx8-acm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
19 - fsl,imx8dxl-acm
20 - fsl,imx8qm-acm
21 - fsl,imx8qxp-acm
26 power-domains:
30 '#clock-cells':
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
14 model to control the clock gates for the peripherals. An LPCG module
24 include/dt-bindings/clock/imx8-clock.h
29 - fsl,imx8qxp-lpcg-adma
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-imx8qxp-lpcg.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/clk-provider.h>
16 #include "clk-scu.h"
17 #include "clk-imx8qxp-lpcg.h"
19 #include <dt-bindings/clock/imx8-clock.h>
22 * struct imx8qxp_lpcg_data - Description of one LPCG clock
27 * @offset: offset of this LPCG clock
28 * @bit_idx: bit index of this LPCG clock
31 * This structure describes one LPCG clock
44 * struct imx8qxp_ss_lpcg - Description of one subsystem LPCG clocks
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/kernel/linux/linux-6.6/drivers/clk/imx/
Dclk-imx8qxp-lpcg.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/clk-provider.h>
16 #include "clk-scu.h"
17 #include "clk-imx8qxp-lpcg.h"
19 #include <dt-bindings/clock/imx8-clock.h>
22 * struct imx8qxp_lpcg_data - Description of one LPCG clock
27 * @offset: offset of this LPCG clock
28 * @bit_idx: bit index of this LPCG clock
31 * This structure describes one LPCG clock
44 * struct imx8qxp_ss_lpcg - Description of one subsystem LPCG clocks
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 mxc-clk-objs += clk.o
4 mxc-clk-objs += clk-busy.o
5 mxc-clk-objs += clk-composite-7ulp.o
6 mxc-clk-objs += clk-composite-8m.o
7 mxc-clk-objs += clk-composite-93.o
8 mxc-clk-objs += clk-fracn-gppll.o
9 mxc-clk-objs += clk-cpu.o
10 mxc-clk-objs += clk-divider-gate.o
11 mxc-clk-objs += clk-fixup-div.o
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8-ss-audio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 audio_ipg_clk: clock-audio-ipg {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
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Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 conn_axi_clk: clock-conn-axi {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
[all …]
Dimx8-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 lsio_mem_clk: clock-lsio-mem {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
11 compatible = "simple-bus";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 dma_ipg_clk: clock-dma-ipg {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
[all …]
Dimx8qxp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2020 NXP
8 #include <dt-bindings/clock/imx8-clock.h>
9 #include <dt-bindings/clock/imx8-lpcg.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
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D0005_linux_include.patch7 Change-Id: Icf23f02df7b566848af808b9eeaed889d1773e71
9 diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h
12 --- /dev/null
13 +++ b/include/drm/bridge/cdns-mhdp.h
14 @@ -0,0 +1,921 @@
15 +/* SPDX-License-Identifier: GPL-2.0 */
18 + * Author: Chris Zhong <zyw@rock-chips.com>
39 +#include <sound/hdmi-codec.h>
489 +#define F_HDMI_ENCODING(x) (((x) & ((1 << 2) - 1)) << 16)
490 +#define F_VIF_DATA_WIDTH(x) (((x) & ((1 << 2) - 1)) << 2)
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8qxp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx8-clock.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dfsl,imx8qm-cdns3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8qm-cdns3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Frank Li <Frank.Li@nxp.com>
15 const: fsl,imx8qm-usb3
19 - description: Register set for iMX USB3 Platform Control
21 "#address-cells":
24 "#size-cells":
31 - description: Standby clock. Used during ultra low power states.
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
35 - $ref: simple-pm-bus.yaml#
37 # We need a select here so we don't match all nodes with 'simple-pm-bus'.
43 - fsl,imx8qxp-display-pixel-link-msi-bus
44 - fsl,imx8qm-display-pixel-link-msi-bus
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pixel-combiner.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
23 - fsl,imx8qm-pixel-combiner
24 - fsl,imx8qxp-pixel-combiner
26 "#address-cells":
29 "#size-cells":
38 clock-names:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dfsl,imx8qxp-csr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
17 use-case is for some other nodes to acquire a reference to the syscon node
18 by phandle, and the other typical use-case is that the operating system
23 pattern: "^syscon@[0-9a-f]+$"
27 - enum:
28 - fsl,imx8qxp-mipi-lvds-csr
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0015_linux_drivers_clk.patch7 Change-Id: Iad3fba6c51f290df25555d1136fd2cc4761d3324
9 diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
11 --- a/drivers/clk/Kconfig
13 @@ -374,6 +374,7 @@ source "drivers/clk/mvebu/Kconfig"
21 diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
23 --- a/drivers/clk/Makefile
25 @@ -102,6 +102,7 @@ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/
26 obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/
27 obj-y += renesas/
28 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
[all …]
D0020_linux_drivers_gpu.patch7 Change-Id: Ie95ebc16d7424b75135df39b9e20893d1a5171d6
9 diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
11 --- a/drivers/gpu/Makefile
13 @@ -3,6 +3,7 @@
16 obj-$(CONFIG_TEGRA_HOST1X) += host1x/
17 +obj-y += imx/
18 obj-y += drm/ vga/
19 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
20 obj-$(CONFIG_TRACE_GPU_MEM) += trace/
21 diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
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