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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx8mn-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mn-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IMX8MN IOMUX Controller
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mn-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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Dimx8mn-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 Variscite Ltd.
7 /dts-v1/;
9 #include "imx8mn-var-som.dtsi"
12 model = "Variscite VAR-SOM-MX8MN Symphony evaluation board";
13 compatible = "variscite,var-som-mx8mn-symphony", "variscite,var-som-mx8mn", "fsl,imx8mn";
15 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
16 compatible = "regulator-fixed";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
8 #include "imx8mn.dtsi"
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
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Dimx8mn-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/usb/pd.h>
7 #include "imx8mn.dtsi"
11 stdout-path = &uart2;
14 gpio-leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_led>;
22 default-state = "on";
31 reg_usdhc2_vmmc: regulator-usdhc2 {
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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Dimx8mn-bsh-smm-s2.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
13 compatible = "bsh,imx8mn-bsh-smm-s2", "fsl,imx8mn";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_gpmi_nand>;
24 nand-on-flash-bbt;
28 &iomuxc {
Dimx8mn-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include "imx8mn.dtsi"
9 #include "imx8mn-beacon-som.dtsi"
10 #include "imx8mn-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
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Dimx8mn-bsh-smm-s2pro.dts1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn-bsh-smm-s2-common.dtsi"
10 #include <dt-bindings/sound/tlv320aic31xx.h>
14 compatible = "bsh,imx8mn-bsh-smm-s2pro", "fsl,imx8mn";
21 sound-tlv320aic31xx {
22 compatible = "fsl,imx-audio-tlv320aic31xx";
23 model = "tlv320aic31xx-hifi";
24 audio-cpu = <&sai3>;
25 audio-codec = <&tlv320dac3101>;
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Dimx8mn-tqma8mqnl-mba8mx.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mn-tqma8mqnl.dtsi"
12 model = "TQ-Systems GmbH i.MX8MN TQMa8MxNL on MBa8Mx";
13 compatible = "tq,imx8mn-tqma8mqnl-mba8mx", "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
24 reg_usdhc2_vmmc: regulator-vmmc {
25 compatible = "regulator-fixed";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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Dimx8mn-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2019-2020 Variscite Ltd.
9 /dts-v1/;
11 #include <dt-bindings/usb/pd.h>
12 #include "imx8mn-var-som.dtsi"
15 model = "Variscite VAR-SOM-MX8MN Symphony evaluation board";
16 compatible = "variscite,var-som-mx8mn-symphony", "variscite,var-som-mx8mn", "fsl,imx8mn";
18 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
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Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include "imx8mn.dtsi"
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
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Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
8 #include "imx8mn.dtsi"
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
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Dimx8mn-bsh-smm-s2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include "imx8mn.dtsi"
13 stdout-path = &uart4;
16 fec_supply: fec-supply-en {
17 compatible = "regulator-fixed";
18 vin-supply = <&buck4_reg>;
19 regulator-name = "tja1101_en";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
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Dimx8mn-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
13 #include "imx8mn.dtsi"
17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
24 stdout-path = &uart2;
33 compatible = "fixed-clock";
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Dimx8mn-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/usb/pd.h>
7 #include "imx8mn.dtsi"
11 stdout-path = &uart2;
14 gpio-leds {
15 compatible = "gpio-leds";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_led>;
22 default-state = "on";
26 hdmi-connector {
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 i.MX Processors have an IOMUXC General Purpose Register group for
19 - items:
20 - const: fsl,imx8mq-iomuxc-gpr
21 - const: syscon
22 - const: simple-mfd
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx8m-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 - fsl,imx8mm-iomuxc
20 - fsl,imx8mn-iomuxc
21 - fsl,imx8mp-iomuxc
22 - fsl,imx8mq-iomuxc
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/kernel/linux/linux-6.6/drivers/pinctrl/freescale/
Dpinctrl-imx8mn.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imx8mn-iomuxc-gpr",
327 { .compatible = "fsl,imx8mn-iomuxc", .data = &imx8mn_pinctrl_info, },
339 .name = "imx8mn-pinctrl",
/kernel/linux/linux-5.10/drivers/pinctrl/freescale/
Dpinctrl-imx8mn.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imx8mn-iomuxc-gpr",
327 { .compatible = "fsl,imx8mn-iomuxc", .data = &imx8mn_pinctrl_info, },
339 .name = "imx8mn-pinctrl",
/kernel/linux/linux-6.6/drivers/remoteproc/
Dimx_rproc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/firmware/imx/rsrc.h>
7 #include <linux/arm-smccc.h>
74 * struct imx_rproc_mem - slim internal memory structure
124 /* TCM CODE NON-SECURE */
132 /* TCM SYS NON-SECURE*/
185 /* QSPI Code - alias */
187 /* DDR (Code) - alias */
191 /* OCRAM_S - alias */
205 /* TCML - alias */
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/kernel/linux/linux-6.6/sound/soc/fsl/
Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include "imx-pcm.h"
45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
66 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state()
69 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state()
73 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state()
77 state = pinctrl_lookup_state(sai->pinctrl, "pcm_b2m"); in fsl_sai_get_pins_state()
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0020_linux_drivers_gpu.patch7 Change-Id: Ie95ebc16d7424b75135df39b9e20893d1a5171d6
9 diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
11 --- a/drivers/gpu/Makefile
13 @@ -3,6 +3,7 @@
16 obj-$(CONFIG_TEGRA_HOST1X) += host1x/
17 +obj-y += imx/
18 obj-y += drm/ vga/
19 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
20 obj-$(CONFIG_TRACE_GPU_MEM) += trace/
21 diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
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