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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/rng/
Dbrcm,iproc-rng200.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HWRNG support for the iproc-rng200 driver
10 - Florian Fainelli <f.fainelli@gmail.com>
15 - brcm,bcm2711-rng200
16 - brcm,bcm7211-rng200
17 - brcm,bcm7278-rng200
18 - brcm,iproc-rng200
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/rng/
Dbrcm,iproc-rng200.txt1 HWRNG support for the iproc-rng200 driver
4 - compatible : Must be one of:
5 "brcm,bcm2711-rng200"
6 "brcm,bcm7211-rng200"
7 "brcm,bcm7278-rng200"
8 "brcm,iproc-rng200"
9 - reg : base address and size of control register block
14 compatible = "brcm,iproc-rng200";
/kernel/linux/linux-6.6/drivers/char/hw_random/
Diproc-rng200.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * DESCRIPTION: The Broadcom iProc RNG200 Driver
106 status = ioread32(priv->base + RNG_INT_STATUS_OFFSET); in iproc_rng200_read()
111 return max - num_remaining; in iproc_rng200_read()
113 iproc_rng200_restart(priv->base); in iproc_rng200_read()
118 if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) & in iproc_rng200_read()
123 *(uint32_t *)buf = ioread32(priv->base + in iproc_rng200_read()
126 num_remaining -= sizeof(uint32_t); in iproc_rng200_read()
129 uint32_t rnd_number = ioread32(priv->base + in iproc_rng200_read()
141 return max - num_remaining; in iproc_rng200_read()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
31 the default FPGA bitstream on the TS-7800 has such functionality.
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
44 Generator hardware found on Intel i8xx-based motherboards.
47 module will be called intel-rng.
57 This driver provides kernel-side support for the Random Number
58 Generator hardware found on AMD 76x-based motherboards.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_HW_RANDOM) += rng-core.o
7 rng-core-y := core.o
8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
11 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
12 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o
13 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
14 obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
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/kernel/linux/linux-5.10/drivers/char/hw_random/
Diproc-rng200.c14 * DESCRIPTION: The Broadcom iProc RNG200 Driver
110 status = ioread32(priv->base + RNG_INT_STATUS_OFFSET); in iproc_rng200_read()
115 return max - num_remaining; in iproc_rng200_read()
117 iproc_rng200_restart(priv->base); in iproc_rng200_read()
122 if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) & in iproc_rng200_read()
127 *(uint32_t *)buf = ioread32(priv->base + in iproc_rng200_read()
130 num_remaining -= sizeof(uint32_t); in iproc_rng200_read()
133 uint32_t rnd_number = ioread32(priv->base + in iproc_rng200_read()
145 return max - num_remaining; in iproc_rng200_read()
152 return max - num_remaining; in iproc_rng200_read()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 module will be called rng-core. This provides a device
28 This driver provides kernel-side support for a generic Random
31 the default FPGA bitstream on the TS-7800 has such functionality.
34 module will be called timeriomem-rng.
43 This driver provides kernel-side support for the Random Number
44 Generator hardware found on Intel i8xx-based motherboards.
47 module will be called intel-rng.
56 This driver provides kernel-side support for the Random Number
57 Generator hardware found on AMD 76x-based motherboards.
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_HW_RANDOM) += rng-core.o
7 rng-core-y := core.o
8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
11 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
12 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o
13 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
14 obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
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/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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