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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/
Dfsl,layerscape-dcfg.txt1 Freescale DCFG
3 DCFG is the device configuration unit, that provides general purpose
8 - compatible: Should contain a chip-specific compatible string,
9 Chip-specific strings are of the form "fsl,<chip>-dcfg",
11 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
13 - reg : should contain base address and length of DCFG memory-mapped registers
16 dcfg: dcfg@1ee0000 {
17 compatible = "fsl,ls1021a-dcfg";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/fsl/
Dfsl,layerscape-dcfg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-dcfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Li Yang <leoyang.li@nxp.com>
14 DCFG is the device configuration unit, that provides general purpose
22 - items:
23 - enum:
24 - fsl,ls1012a-dcfg
[all …]
/kernel/linux/linux-5.10/drivers/soc/fsl/
Dguts.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 * Power Architecture-based SoCs T Series
61 * ARM-based SoCs LS Series
94 /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A */
95 { .die = "LS1021A",
115 while (matches->svr) { in fsl_soc_die_match()
116 if (matches->svr == (svr & matches->mask)) in fsl_soc_die_match()
127 if (!guts || !guts->regs) in fsl_guts_get_svr()
130 if (guts->little_endian) in fsl_guts_get_svr()
131 svr = ioread32(&guts->regs->svr); in fsl_guts_get_svr()
[all …]
/kernel/linux/linux-6.6/drivers/soc/fsl/
Dguts.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 * Power Architecture-based SoCs T Series
56 * ARM-based SoCs LS Series
89 /* Die: LS1021A, SoC: LS1021A/LS1020A/LS1022A */
90 { .die = "LS1021A",
110 while (matches->svr) { in fsl_soc_die_match()
111 if (matches->svr == (svr & matches->mask)) in fsl_soc_die_match()
145 .sfp_compat = "fsl,ls1028a-sfp",
154 { .compatible = "fsl,qoriq-device-config-1.0", },
155 { .compatible = "fsl,qoriq-device-config-2.0", },
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/ls/
Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dls1021a.dtsi2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
54 compatible = "fsl,ls1021a";
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
[all …]
Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
[all …]
Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
[all …]
Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
[all …]
Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
[all …]
Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-imx/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 /* .virtual and .pfn are run-time assigned */
51 * Initialise the CPU possible map early - this describes the CPUs
110 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); in ls1021a_smp_prepare_cpus()
/kernel/linux/linux-6.6/arch/arm/mach-imx/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 /* .virtual and .pfn are run-time assigned */
51 * Initialise the CPU possible map early - this describes the CPUs
96 * Initialise the CPU possible map early - this describes the CPUs
136 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); in ls1021a_smp_prepare_cpus()