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Searched +full:meson6 +full:- +full:efuse (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/
Damlogic,meson6-efuse.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson6 eFuse
10 - Neil Armstrong <neil.armstrong@linaro.org>
11 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
14 - $ref: nvmem.yaml#
19 - amlogic,meson6-efuse
20 - amlogic,meson8-efuse
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Damlogic-meson-mx-efuse.txt1 Amlogic Meson6/Meson8/Meson8b efuse
4 - compatible: depending on the SoC this should be one of:
5 - "amlogic,meson6-efuse"
6 - "amlogic,meson8-efuse"
7 - "amlogic,meson8b-efuse"
8 - reg: base address and size of the efuse registers
9 - clocks: a reference to the efuse core gate clock
10 - clock-names: must be "core"
12 All properties and sub-nodes as well as the consumer bindings
17 efuse: nvmem@0 {
[all …]
/kernel/linux/linux-5.10/drivers/nvmem/
Dmeson-mx-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver
15 #include <linux/nvmem-provider.h>
51 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
56 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
60 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
63 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
67 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
71 /* power up the efuse */ in meson_mx_efuse_hw_enable()
72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
56 tristate "JZ4780 EFUSE Memory Support"
62 Say Y here to include support for JZ4780 efuse memory found on
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/kernel/linux/linux-6.6/drivers/nvmem/
Dmeson-mx-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson6, Meson8 and Meson8b eFuse Driver
15 #include <linux/nvmem-provider.h>
50 static void meson_mx_efuse_mask_bits(struct meson_mx_efuse *efuse, u32 reg, in meson_mx_efuse_mask_bits() argument
55 data = readl(efuse->base + reg); in meson_mx_efuse_mask_bits()
59 writel(data, efuse->base + reg); in meson_mx_efuse_mask_bits()
62 static int meson_mx_efuse_hw_enable(struct meson_mx_efuse *efuse) in meson_mx_efuse_hw_enable() argument
66 err = clk_prepare_enable(efuse->core_clk); in meson_mx_efuse_hw_enable()
70 /* power up the efuse */ in meson_mx_efuse_hw_enable()
71 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1, in meson_mx_efuse_hw_enable()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "Apple eFuse support"
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
15 compatible = "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "simple-bus";
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Dmeson6.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
9 model = "Amlogic Meson6 SoC";
10 compatible = "amlogic,meson6";
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
19 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
26 next-level-cache = <&L2>;
32 compatible = "simple-bus";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/amlogic/
Dmeson.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/sound/meson-aiu.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
15 iio-hwmon {
16 compatible = "iio-hwmon";
17 io-channels = <&saradc 8>;
[all …]
Dmeson6.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
9 model = "Amlogic Meson6 SoC";
10 compatible = "amlogic,meson6";
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
19 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
26 next-level-cache = <&L2>;
32 compatible = "simple-bus";
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/kernel/linux/linux-5.10/drivers/iio/adc/
Dmeson_saradc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
15 #include <linux/nvmem-consumer.h>
96 (8 + (((_chan) - 2) * 3))
153 * and u-boot source served as reference). These only seem to be relevant on
167 /* temperature sensor calibration information in eFuse */
306 regmap_read(priv->regmap, MESON_SAR_ADC_REG0, &regval); in meson_sar_adc_get_fifo_count()
317 tmp = div_s64((s64)val * priv->calibscale, MILLION) + priv->calibbias; in meson_sar_adc_calib_val()
319 return clamp(tmp, 0, (1 << priv->param->resolution) - 1); in meson_sar_adc_calib_val()
334 regmap_read(priv->regmap, MESON_SAR_ADC_REG0, &regval); in meson_sar_adc_wait_busy_clear()
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/kernel/linux/linux-6.6/drivers/iio/adc/
Dmeson_saradc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
96 (8 + (((_chan) - 2) * 3))
153 * and u-boot source served as reference). These only seem to be relevant on
172 /* temperature sensor calibration information in eFuse */
380 for (i = 0; i < indio_dev->num_channels; i++) in find_channel_by_num()
381 if (indio_dev->channels[i].channel == num) in find_channel_by_num()
382 return &indio_dev->channels[i]; in find_channel_by_num()
391 regmap_read(priv->regmap, MESON_SAR_ADC_REG0, &regval); in meson_sar_adc_get_fifo_count()
[all …]