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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dmt6577_auxadc.txt1 * Mediatek AUXADC - Analog to Digital Converter on Mediatek mobile soc (mt65xx/mt81xx/mt27xx)
4 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
7 used by thermal controller which reads the temperatures from the AUXADC
9 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
10 for the Thermal Controller which holds a phandle to the AUXADC.
13 - compatible: Should be one of:
14 - "mediatek,mt2701-auxadc": For MT2701 family of SoCs
15 - "mediatek,mt2712-auxadc": For MT2712 family of SoCs
16 - "mediatek,mt6765-auxadc": For MT6765 family of SoCs
17 - "mediatek,mt7622-auxadc": For MT7622 family of SoCs
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/
Dmediatek,mt2701-auxadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
14 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
17 used by thermal controller which reads the temperatures from the AUXADC
18 directly via its own bus interface. See mediatek-thermal bindings
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dmediatek-thermal.txt4 which measures the on-SoC temperatures. This device does not have its own ADC,
5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
6 this device needs phandles to the AUXADC. Also it controls a mux in the
11 - compatible:
12 - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13 - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14 - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15 - "mediatek,mt7622-thermal" : For MT7622 SoC
16 - "mediatek,mt8183-thermal" : For MT8183 family of SoCs
17 - reg: Address range of the thermal controller
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/thermal/
Dmediatek-thermal.txt4 which measures the on-SoC temperatures. This device does not have its own ADC,
5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
6 this device needs phandles to the AUXADC. Also it controls a mux in the
11 - compatible:
12 - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
13 - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
14 - "mediatek,mt2712-thermal" : For MT2712 family of SoCs
15 - "mediatek,mt7622-thermal" : For MT7622 SoC
16 - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC
17 - "mediatek,mt7986-thermal" : For MT7986 SoC
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/kernel/linux/linux-5.10/drivers/thermal/
Dmtk_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
26 /* AUXADC Registers */
91 /* MT8173 thermal sensors */
98 /* AUXADC channel 11 is used for the temperature sensors */
101 /* The total number of temperature sensors in the MT8173 */
104 /* The number of banks in the MT8173 */
110 /* The number of controller in the MT8173 */
118 * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
120 * MT8173 has 5 sensors and needs 5 VTS calibration data.
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/kernel/linux/linux-6.6/drivers/thermal/mediatek/
Dauxadc_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
27 /* AUXADC Registers */
93 /* MT8173 thermal sensors */
100 /* AUXADC channel 11 is used for the temperature sensors */
103 /* The total number of temperature sensors in the MT8173 */
106 /* The number of banks in the MT8173 */
112 /* The number of controller in the MT8173 */
119 #define MT8173_TEMP_MIN -20000
124 * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
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Dmt8516.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8516-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/phy/phy.h>
13 #include "mt8516-pinfunc.h"
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
19 #size-cells = <2>;
21 cluster0_opp: opp-table-0 {
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Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
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Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
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Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
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Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi14 #include <dt-bindings/clock/mt8173-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/memory/mt8173-larb-port.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/power/mt8173-power.h>
20 #include <dt-bindings/reset/mt8173-resets.h>
21 #include <dt-bindings/gce/mt8173-gce.h>
22 #include <dt-bindings/thermal/thermal.h>
23 #include "mt8173-pinfunc.h"
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Dmt7622.dtsi6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/mt7622-clk.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt7622-power.h>
14 #include <dt-bindings/reset/mt7622-reset.h>
15 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&sysirq>;
20 #address-cells = <2>;
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Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset-controller/mt8183-resets.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "mt8183-pinfunc.h"
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
19 #size-cells = <2>;
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/kernel/linux/linux-6.6/drivers/iio/adc/
Dmt6577_auxadc.c1 // SPDX-License-Identifier: GPL-2.0-only
118 reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 + in mt6577_auxadc_read()
119 chan->channel * 0x04; in mt6577_auxadc_read()
121 mutex_lock(&adc_dev->lock); in mt6577_auxadc_read()
123 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_CON1, in mt6577_auxadc_read()
124 0, 1 << chan->channel); in mt6577_auxadc_read()
132 dev_err(indio_dev->dev.parent, in mt6577_auxadc_read()
134 chan->channel); in mt6577_auxadc_read()
139 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_CON1, in mt6577_auxadc_read()
140 1 << chan->channel, 0); in mt6577_auxadc_read()
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/kernel/linux/linux-5.10/drivers/iio/adc/
Dmt6577_auxadc.c1 // SPDX-License-Identifier: GPL-2.0-only
113 reg_channel = adc_dev->reg_base + MT6577_AUXADC_DAT0 + in mt6577_auxadc_read()
114 chan->channel * 0x04; in mt6577_auxadc_read()
116 mutex_lock(&adc_dev->lock); in mt6577_auxadc_read()
118 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_CON1, in mt6577_auxadc_read()
119 0, 1 << chan->channel); in mt6577_auxadc_read()
127 dev_err(indio_dev->dev.parent, in mt6577_auxadc_read()
129 chan->channel); in mt6577_auxadc_read()
134 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_CON1, in mt6577_auxadc_read()
135 1 << chan->channel, 0); in mt6577_auxadc_read()
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
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/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
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Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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