Searched +full:mt8186 +full:- +full:fhctl (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/mediatek,mt8186-fhctl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Edward-JW Yang <edward-jw.yang@mediatek.com>13 Frequency hopping control (FHCTL) is a piece of hardware that control20 - mediatek,mt6795-fhctl21 - mediatek,mt8173-fhctl22 - mediatek,mt8186-fhctl23 - mediatek,mt8192-fhctl[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>6 #include <linux/clk-provider.h>8 #include <dt-bindings/clock/mt8186-clk.h>10 #include "clk-fhctl.h"11 #include "clk-mtk.h"12 #include "clk-pll.h"13 #include "clk-pllfh.h"136 { .compatible = "mediatek,mt8186-apmixedsys", },144 struct device_node *node = pdev->dev.of_node; in clk_mt8186_apmixed_probe()[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o5 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o6 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o7 obj-$(CONFIG_COMMON_CLK_MT6765_CAMSYS) += clk-mt6765-cam.o8 obj-$(CONFIG_COMMON_CLK_MT6765_IMGSYS) += clk-mt6765-img.o9 obj-$(CONFIG_COMMON_CLK_MT6765_MIPI0ASYS) += clk-mt6765-mipi0a.o10 obj-$(CONFIG_COMMON_CLK_MT6765_MMSYS) += clk-mt6765-mm.o11 obj-$(CONFIG_COMMON_CLK_MT6765_VCODECSYS) += clk-mt6765-vcodec.o[all …]
1 # SPDX-License-Identifier: GPL-2.0-only15 bool "clock driver for MediaTek FHCTL hardware control"360 to PCI-E and USB.390 to PCI-E and USB.601 tristate "Clock driver for MediaTek MT8186"607 This driver supports MediaTek MT8186 clocks.610 tristate "Clock driver for MediaTek MT8186 camsys"614 This driver supports MediaTek MT8186 camsys and camsys_raw clocks.617 tristate "Clock driver for MediaTek MT8186 imgsys"621 This driver supports MediaTek MT8186 imgsys and imgsys2 clocks.[all …]