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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
18 - interrupts: interrupt line number for the SMI error/done interrupt
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
[all …]
Dmarvell-orion-net.txt1 Marvell Orion/Discovery ethernet controller
4 The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs
12 set of controller registers. Each port node describes port-specific properties.
15 For Orion SoCs we stick to the separation, although there each controller has
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmarvell,orion-mdio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/marvell,orion-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MDIO Ethernet Controller interface
10 - Andrew Lunn <andrew@lunn.ch>
15 provides an interface with the MDIO bus. Additionally, Armada 7k and Armada
22 - marvell,orion-mdio
23 - marvell,xmdio
36 - compatible
[all …]
Dmarvell-orion-net.txt1 Marvell Orion/Discovery ethernet controller
4 The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs
12 set of controller registers. Each port node describes port-specific properties.
15 For Orion SoCs we stick to the separation, although there each controller has
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Dorion5x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 interrupt-parent = <&intc>;
18 #address-cells = <2>;
19 #size-cells = <1>;
22 devbus_bootcs: devbus-bootcs {
23 compatible = "marvell,orion-devbus";
26 #address-cells = <1>;
[all …]
Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
[all …]
Darmada-370-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 compatible = "marvell,armada-370-xp";
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "marvell,sheeva-v7";
38 compatible = "arm,cortex-a9-pmu";
39 interrupts-extended = <&mpic 3>;
43 #address-cells = <2>;
[all …]
Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
22 compatible = "marvell,armada370", "marvell,armada-370-xp";
31 compatible = "marvell,armada370-mbus", "simple-bus";
39 compatible = "marvell,armada-370-pcie";
43 #address-cells = <3>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dorion5x.dtsi2 * Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 interrupt-parent = <&intc>;
23 #address-cells = <2>;
24 #size-cells = <1>;
27 devbus_bootcs: devbus-bootcs {
28 compatible = "marvell,orion-devbus";
31 #address-cells = <1>;
32 #size-cells = <1>;
[all …]
Dkirkwood.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&intc>;
14 #address-cells = <1>;
15 #size-cells = <0>;
22 clock-names = "cpu_clk", "ddrclk", "powersave";
33 compatible = "marvell,kirkwood-mbus", "simple-bus";
[all …]
Darmada-370-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 compatible = "marvell,armada-370-xp";
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "marvell,sheeva-v7";
38 compatible = "arm,cortex-a9-pmu";
39 interrupts-extended = <&mpic 3>;
43 #address-cells = <2>;
[all …]
Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
32 compatible = "arm,cortex-a9-pmu";
33 interrupts-extended = <&mpic 3>;
37 compatible = "marvell,armada380-mbus", "simple-bus";
[all …]
Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
22 compatible = "marvell,armada370", "marvell,armada-370-xp";
31 compatible = "marvell,armada370-mbus", "simple-bus";
39 compatible = "marvell,armada-370-pcie";
43 #address-cells = <3>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/
Dac5-98dx25xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
36 compatible = "arm,cortex-a55";
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 tristate "Marvell Discovery (643XX) and Orion ethernet support"
29 in the Marvell Orion ARM SoC family.
35 tristate "Marvell MDIO interface support"
39 This driver supports the MDIO interface found in the network
72 (Dove, Orion, Discovery, Kirkwood).
117 This driver support the Marvell Yukon or SysKonnect SK-98xx/SK-95xx
125 Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
126 Linksys EG1032/EG1064, 3Com 3C940/3C940B, SysKonnect SK-9871/9872.
161 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21
Dmvmdio.c2 * Driver for the MDIO interface of Marvell network interfaces.
4 * Since the MDIO interface of Marvell network interfaces is shared
8 * the MDIO bus). This driver is currently used by the mvneta and
13 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
55 * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
56 * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
94 struct orion_mdio_dev *dev = bus->priv; in orion_mdio_wait_ready()
100 if (ops->is_done(dev)) in orion_mdio_wait_ready()
105 if (dev->err_interrupt <= 0) { in orion_mdio_wait_ready()
106 usleep_range(ops->poll_interval_min, in orion_mdio_wait_ready()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 tristate "Marvell Discovery (643XX) and Orion ethernet support"
29 in the Marvell Orion ARM SoC family.
35 tristate "Marvell MDIO interface support"
40 This driver supports the MDIO interface found in the network
74 (Dove, Orion, Discovery, Kirkwood).
118 This driver support the Marvell Yukon or SysKonnect SK-98xx/SK-95xx
126 Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
127 Linksys EG1032/EG1064, 3Com 3C940/3C940B, SysKonnect SK-9871/9872.
162 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21
Dmvmdio.c2 * Driver for the MDIO interface of Marvell network interfaces.
4 * Since the MDIO interface of Marvell network interfaces is shared
8 * the MDIO bus). This driver is currently used by the mvneta and
13 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
58 * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
59 * - Armada 370 (Globalscale Mirabox): 41us to 43us (Polled)
90 struct orion_mdio_dev *dev = bus->priv; in orion_mdio_wait_ready()
94 if (dev->err_interrupt <= 0) { in orion_mdio_wait_ready()
95 if (!read_poll_timeout_atomic(ops->is_done, done, done, 2, in orion_mdio_wait_ready()
105 if (wait_event_timeout(dev->smi_busy_wait, in orion_mdio_wait_ready()
[all …]
/kernel/linux/linux-6.6/arch/powerpc/platforms/chrp/
Dpegasos_eth.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
7 * Nicolas DET <nd@bplan-gmbh.de>
39 MV643XX_ETH_SHARED_REGS_SIZE - 1,
52 * The orion mdio driver only covers shared + 0x4 up to shared + 0x84 - 1
56 .name = "ethernet mdio base",
64 .name = "orion-mdio",
65 .id = -1,
125 return -ENOMEM; in Enable_SRAM()
144 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); in Enable_SRAM()
/kernel/linux/linux-5.10/arch/powerpc/platforms/chrp/
Dpegasos_eth.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
7 * Nicolas DET <nd@bplan-gmbh.de>
39 MV643XX_ETH_SHARED_REGS_SIZE - 1,
52 * The orion mdio driver only covers shared + 0x4 up to shared + 0x84 - 1
56 .name = "ethernet mdio base",
64 .name = "orion-mdio",
65 .id = -1,
125 return -ENOMEM; in Enable_SRAM()
144 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); in Enable_SRAM()

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