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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/devfreq/event/
Dexynos-ppmu.txt2 * Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
4 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
5 each IP. PPMU provides the primitive values to get performance data. These
6 PPMU events provide information of the SoC's behaviors so that you may
9 The Exynos PPMU driver uses the devfreq-event class to provide event data
13 Required properties for PPMU device:
14 - compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2.
15 - reg: physical base address of each PPMU and length of memory mapped region.
17 Optional properties for PPMU device:
18 - clock-names : the name of clock used by the PPMU, "ppmu"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/devfreq/event/
Dsamsung,exynos-ppmu.yaml4 $id: http://devicetree.org/schemas/devfreq/event/samsung,exynos-ppmu.yaml#
7 title: Samsung Exynos SoC PPMU (Platform Performance Monitoring Unit)
14 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
15 each IP. PPMU provides the primitive values to get performance data. These
16 PPMU events provide information of the SoC's behaviors so that you may use to
19 Exynos PPMU driver uses the devfreq-event class to provide event data to
26 - samsung,exynos-ppmu
27 - samsung,exynos-ppmu-v2
31 - const: ppmu
43 '^ppmu-event[0-9]+(-[a-z0-9]+){,2}$':
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos4412-ppmu-common.dtsi3 * Device tree sources for Exynos4412 PPMU common device tree
13 ppmu_dmc0_3: ppmu-event3-dmc0 {
14 event-name = "ppmu-event3-dmc0";
23 ppmu_dmc1_3: ppmu-event3-dmc1 {
24 event-name = "ppmu-event3-dmc1";
33 ppmu_leftbus_3: ppmu-event3-leftbus {
34 event-name = "ppmu-event3-leftbus";
43 ppmu_rightbus_3: ppmu-event3-rightbus {
44 event-name = "ppmu-event3-rightbus";
Dexynos4.dtsi786 compatible = "samsung,exynos-ppmu";
789 clock-names = "ppmu";
794 compatible = "samsung,exynos-ppmu";
797 clock-names = "ppmu";
802 compatible = "samsung,exynos-ppmu";
805 clock-names = "ppmu";
810 compatible = "samsung,exynos-ppmu";
813 clock-names = "ppmu";
818 compatible = "samsung,exynos-ppmu";
821 clock-names = "ppmu";
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Dexynos3250.dtsi695 compatible = "samsung,exynos-ppmu";
701 compatible = "samsung,exynos-ppmu";
707 compatible = "samsung,exynos-ppmu";
713 compatible = "samsung,exynos-ppmu";
716 clock-names = "ppmu";
721 compatible = "samsung,exynos-ppmu";
724 clock-names = "ppmu";
729 compatible = "samsung,exynos-ppmu";
732 clock-names = "ppmu";
737 compatible = "samsung,exynos-ppmu";
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Dexynos5420.dtsi302 ppmu_dmc0_0: ppmu@10d00000 {
303 compatible = "samsung,exynos-ppmu";
306 clock-names = "ppmu";
308 ppmu_event3_dmc0_0: ppmu-event3-dmc0_0 {
309 event-name = "ppmu-event3-dmc0_0";
314 ppmu_dmc0_1: ppmu@10d10000 {
315 compatible = "samsung,exynos-ppmu";
318 clock-names = "ppmu";
320 ppmu_event3_dmc0_1: ppmu-event3-dmc0_1 {
321 event-name = "ppmu-event3-dmc0_1";
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/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos4412-ppmu-common.dtsi3 * Device tree sources for Exynos4412 PPMU common device tree
13 ppmu_dmc0_3: ppmu-event3-dmc0 {
14 event-name = "ppmu-event3-dmc0";
23 ppmu_dmc1_3: ppmu-event3-dmc1 {
24 event-name = "ppmu-event3-dmc1";
33 ppmu_leftbus_3: ppmu-event3-leftbus {
34 event-name = "ppmu-event3-leftbus";
43 ppmu_rightbus_3: ppmu-event3-rightbus {
44 event-name = "ppmu-event3-rightbus";
Dexynos4.dtsi778 ppmu_dmc0: ppmu@106a0000 {
779 compatible = "samsung,exynos-ppmu";
782 clock-names = "ppmu";
786 ppmu_dmc1: ppmu@106b0000 {
787 compatible = "samsung,exynos-ppmu";
790 clock-names = "ppmu";
794 ppmu_cpu: ppmu@106c0000 {
795 compatible = "samsung,exynos-ppmu";
798 clock-names = "ppmu";
802 ppmu_rightbus: ppmu@112a0000 {
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Dexynos3250.dtsi873 ppmu_dmc0: ppmu@106a0000 {
874 compatible = "samsung,exynos-ppmu";
879 ppmu_dmc1: ppmu@106b0000 {
880 compatible = "samsung,exynos-ppmu";
885 ppmu_cpu: ppmu@106c0000 {
886 compatible = "samsung,exynos-ppmu";
891 ppmu_rightbus: ppmu@112a0000 {
892 compatible = "samsung,exynos-ppmu";
895 clock-names = "ppmu";
899 ppmu_leftbus: ppmu@116a0000 {
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Dexynos5420.dtsi407 ppmu_dmc0_0: ppmu@10d00000 {
408 compatible = "samsung,exynos-ppmu";
411 clock-names = "ppmu";
413 ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 {
414 event-name = "ppmu-event3-dmc0-0";
419 ppmu_dmc0_1: ppmu@10d10000 {
420 compatible = "samsung,exynos-ppmu";
423 clock-names = "ppmu";
425 ppmu_event3_dmc0_1: ppmu-event3-dmc0-1 {
426 event-name = "ppmu-event3-dmc0-1";
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/kernel/linux/linux-5.10/arch/powerpc/perf/
Dcore-book3s.c61 static struct power_pmu *ppmu; variable
77 * these registers (via mtspr/mfspr) are done under ppmu flag
137 if (!ppmu) in is_sier_available()
140 if (ppmu->flags & PPMU_HAS_SIER) in is_sier_available()
169 if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) { in perf_ip_adjust()
191 if (ppmu->flags & PPMU_HAS_SIER) in perf_get_data_addr()
196 if (ppmu->flags & PPMU_SIAR_VALID) in perf_get_data_addr()
198 else if (ppmu->flags & PPMU_ALT_SIPR) in perf_get_data_addr()
200 else if (ppmu->flags & PPMU_NO_SIAR) in perf_get_data_addr()
219 if (ppmu->flags & PPMU_HAS_SIER) in regs_sihv()
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Dcore-fsl-emb.c27 static struct fsl_emb_pmu *ppmu; variable
280 int num_counters = ppmu->n_counter; in fsl_emb_pmu_add()
288 num_counters = ppmu->n_restricted; in fsl_emb_pmu_add()
447 if (!ppmu->cache_events) in hw_perf_cache_event()
460 ev = (*ppmu->cache_events)[type][op][result]; in hw_perf_cache_event()
478 if (ppmu->n_counter > MAX_HWEVENTS) { in fsl_emb_pmu_event_init()
480 ppmu->n_counter, MAX_HWEVENTS); in fsl_emb_pmu_event_init()
481 ppmu->n_counter = MAX_HWEVENTS; in fsl_emb_pmu_event_init()
487 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0) in fsl_emb_pmu_event_init()
489 ev = ppmu->generic_events[ev]; in fsl_emb_pmu_event_init()
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/kernel/linux/linux-6.6/drivers/devfreq/event/
Dexynos-ppmu.c3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
22 #include "exynos-ppmu.h"
41 struct exynos_ppmu_data ppmu; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
126 * The devfreq-event ops structure for PPMU v1.1
144 /* Disable PPMU */ in exynos_ppmu_disable()
183 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_set_event()
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DKconfig27 tristate "Exynos PPMU (Platform Performance Monitoring Unit) DEVFREQ event Driver"
31 This add the devfreq-event driver for Exynos SoC. It provides PPMU
/kernel/linux/linux-5.10/drivers/devfreq/event/
Dexynos-ppmu.c3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
22 #include "exynos-ppmu.h"
41 struct exynos_ppmu_data ppmu; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
121 * The devfreq-event ops structure for PPMU v1.1
139 /* Disable PPMU */ in exynos_ppmu_disable()
178 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_set_event()
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DKconfig27 tristate "Exynos PPMU (Platform Performance Monitoring Unit) DEVFREQ event Driver"
31 This add the devfreq-event driver for Exynos SoC. It provides PPMU
/kernel/linux/linux-6.6/arch/powerpc/perf/
Dcore-book3s.c66 static struct power_pmu *ppmu; variable
82 * these registers (via mtspr/mfspr) are done under ppmu flag
142 if (!ppmu) in is_sier_available()
145 if (ppmu->flags & PPMU_HAS_SIER) in is_sier_available()
185 if ((ppmu->flags & PPMU_HAS_SSLOT) && (mmcra & MMCRA_SAMPLE_ENABLE)) { in perf_ip_adjust()
207 if (ppmu->flags & PPMU_HAS_SIER) in perf_get_data_addr()
212 if (ppmu->flags & PPMU_SIAR_VALID) in perf_get_data_addr()
214 else if (ppmu->flags & PPMU_ALT_SIPR) in perf_get_data_addr()
216 else if (ppmu->flags & PPMU_NO_SIAR) in perf_get_data_addr()
235 if (ppmu->flags & PPMU_HAS_SIER) in regs_sihv()
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Dcore-fsl-emb.c27 static struct fsl_emb_pmu *ppmu; variable
280 int num_counters = ppmu->n_counter; in fsl_emb_pmu_add()
288 num_counters = ppmu->n_restricted; in fsl_emb_pmu_add()
447 if (!ppmu->cache_events) in hw_perf_cache_event()
460 ev = (*ppmu->cache_events)[type][op][result]; in hw_perf_cache_event()
478 if (ppmu->n_counter > MAX_HWEVENTS) { in fsl_emb_pmu_event_init()
480 ppmu->n_counter, MAX_HWEVENTS); in fsl_emb_pmu_event_init()
481 ppmu->n_counter = MAX_HWEVENTS; in fsl_emb_pmu_event_init()
487 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0) in fsl_emb_pmu_event_init()
489 ev = ppmu->generic_events[ev]; in fsl_emb_pmu_event_init()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dexynos5422-dmc.txt6 runtime, the driver uses the PPMU (Platform Performance Monitoring Unit), which
20 - devfreq-events : phandles for PPMU devices connected to this DMC.
27 - devfreq-events : phandles of the PPMU events used by the controller.
44 ppmu_dmc0_0: ppmu@10d00000 {
45 compatible = "samsung,exynos-ppmu";
48 clock-names = "ppmu";
50 ppmu_event_dmc0_0: ppmu-event3-dmc0_0 {
51 event-name = "ppmu-event3-dmc0_0";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dsamsung,exynos5422-dmc.yaml19 controller in runtime, the driver uses the PPMU (Platform Performance
50 description: phandles of the PPMU events used by the controller.
99 ppmu_dmc0_0: ppmu@10d00000 {
100 compatible = "samsung,exynos-ppmu";
103 clock-names = "ppmu";
105 ppmu_event_dmc0_0: ppmu-event3-dmc0-0 {
106 event-name = "ppmu-event3-dmc0_0";
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgf119.c51 struct nvkm_pmu **ppmu) in gf119_pmu_new() argument
53 return nvkm_pmu_new_(gf119_pmu_fwif, device, type, inst, ppmu); in gf119_pmu_new()
Dgm107.c53 struct nvkm_pmu **ppmu) in gm107_pmu_new() argument
55 return nvkm_pmu_new_(gm107_pmu_fwif, device, type, inst, ppmu); in gm107_pmu_new()
Dgk208.c52 struct nvkm_pmu **ppmu) in gk208_pmu_new() argument
54 return nvkm_pmu_new_(gk208_pmu_fwif, device, type, inst, ppmu); in gk208_pmu_new()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgp102.c54 gp102_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) in gp102_pmu_new() argument
56 return nvkm_pmu_new_(gp102_pmu_fwif, device, index, ppmu); in gp102_pmu_new()
Dgf119.c50 gf119_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) in gf119_pmu_new() argument
52 return nvkm_pmu_new_(gf119_pmu_fwif, device, index, ppmu); in gf119_pmu_new()

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