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/arkcompiler/ets_runtime/ecmascript/compiler/assembler/x64/
Dassembler_x64.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
21 enum Register : uint8_t { enum
63 Operand(Register base, int32_t disp);
64 Operand(Register base, Register index, Scale scale, int32_t disp);
65 Operand(Register index, Scale scale, int32_t disp);
68 void BuildSIB(Scale scale, Register index, Register base);
69 void BuildModerm(int32_t mode, Register rm);
89 void Pushq(Register x);
91 void Push(Register x);
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Dextended_assembler_x64.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
24 // ExtendedAssembler implements frequently-used assembler macros with some extended usages.
41 void PushArgsWithArgv(Register argc, Register argv, Register operatorRegister);
42 void PushArgc(int32_t argc, Register tempArgcRegister);
43 void PushArgc(Register argcRegister, Register tempArgcRegister);
45 Register TempRegister() in TempRegister()
48 LOG_COMPILER(FATAL) << "temp register inuse."; in TempRegister()
54 Register AvailableRegister1() const in AvailableRegister1()
56 // r10 is neither callee saved reegister nor argument register in AvailableRegister1()
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/arkcompiler/ets_runtime/ecmascript/compiler/trampoline/aarch64/
Dcommon_call.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
46 // +--------------------------+ in GetStackArgOffSetToFp()
48 // +--------------------------+ --- in GetStackArgOffSetToFp()
50 // |--------------------------| arguments in GetStackArgOffSetToFp()
52 // |--------------------------| | in GetStackArgOffSetToFp()
54 // |--------------------------| | in GetStackArgOffSetToFp()
56 // |--------------------------| Fixed OptimizedBuiltinLeaveFrame in GetStackArgOffSetToFp()
58 // |--------------------------| | in GetStackArgOffSetToFp()
60 // +--------------------------+ --- in GetStackArgOffSetToFp()
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Doptimized_fast_call.cpp2 * Copyright (c) 2023-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
32 #define __ assembler->
37 // %x0 - glue
38 // %x1 - actualNumArgs
39 // %x2 - argV
40 // %x3 - prevFp
44 Register glueReg(X0); in OptimizedFastCallEntry()
45 Register argc(X1); in OptimizedFastCallEntry()
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Doptimized_call.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
32 #define __ assembler->
35 // * webkit_jscc calling convention call runtime_id's runtime function(c-abi)
37 // %x0 - glue
39 // * Optimized-leaved-frame layout as the following:
40 // +--------------------------+
41 // | argv[N-1] |
42 // |--------------------------|
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Dcommon_call.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
32 #define __ assembler->
36 Register fp(X29); in PushAsmInterpBridgeFrame()
37 Register sp(SP); in PushAsmInterpBridgeFrame()
40 Register frameTypeRegister = __ TempRegister1(); in PushAsmInterpBridgeFrame()
44 …__ Stp(frameTypeRegister, Register(X30), MemoryOperand(sp, -2 * FRAME_SLOT_SIZE, AddrMode::PREINDE… in PushAsmInterpBridgeFrame()
46 … __ Stp(Register(Zero), Register(FP), MemoryOperand(sp, -2 * FRAME_SLOT_SIZE, AddrMode::PREINDEX)); in PushAsmInterpBridgeFrame()
49 if (!assembler->FromInterpreterHandler()) { in PushAsmInterpBridgeFrame()
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Dasm_interpreter_call.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
33 #define __ assembler->
37 // Input: glue - %X0
38 // callTarget - %X1
39 // method - %X2
40 // callField - %X3
41 // argc - %X4
42 // argv - %X5(<callTarget, newTarget, this> are at the beginning of argv)
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/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/
Dextend_assembler.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
21 Register ExtendedAssembler::ghcJSCallDispacherArgs_[JS_CALL_DISPATCHER_ARGS_COUNT] = {
24 Register ExtendedAssembler::cppJSCallDispacherArgs_[JS_CALL_DISPATCHER_ARGS_COUNT] = {
30 Register sp(SP); in CalleeSave()
31 Stp(Register(X27), Register(X28), MemoryOperand(sp, -PAIR_SLOT_SIZE, PREINDEX)); in CalleeSave()
32 Stp(Register(X25), Register(X26), MemoryOperand(sp, -PAIR_SLOT_SIZE, PREINDEX)); in CalleeSave()
33 Stp(Register(X23), Register(X24), MemoryOperand(sp, -PAIR_SLOT_SIZE, PREINDEX)); in CalleeSave()
34 Stp(Register(X21), Register(X22), MemoryOperand(sp, -PAIR_SLOT_SIZE, PREINDEX)); in CalleeSave()
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Dassembler_aarch64.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
23 class Register {
25 Register(RegisterId reg, RegisterType type = RegisterType::X) : reg_(reg), type_(type) {}; in reg_()
27 Register W() const in W()
29 return Register(reg_, RegisterType::W); in W()
32 Register X() const in X()
34 return Register(reg_, RegisterType::X); in X()
62 inline bool operator !=(const Register &other)
67 inline bool operator ==(const Register &other)
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Dextend_assembler.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
25 // ExtendAssembler implements frequently-used assembler macros.
44 void PushArgc(int32_t argc, Register op, Register fp);
45 void PushArgc(Register argc, Register op, Register fp);
46 void Align16(Register fp);
48 Register TempRegister1() in TempRegister1()
57 Register TempRegister2() in TempRegister2()
66 Register AvailableRegister1() const in AvailableRegister1()
68 // X11 is neither callee saved reegister nor argument register in AvailableRegister1()
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Dmacro_assembler_aarch64.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
56 const std::vector<aarch64::Register> registerParamVec {
57 … aarch64::Register(aarch64::X0), aarch64::Register(aarch64::X1), aarch64::Register(aarch64::X2),
58 … aarch64::Register(aarch64::X3), aarch64::Register(aarch64::X4), aarch64::Register(aarch64::X5),
59 aarch64::Register(aarch64::X6), aarch64::Register(aarch64::X7) };
60 …const aarch64::Register GLUE_REGISTER = aarch64::Register(aarch64::X19); // same with ghc callco…
61 const aarch64::Register LOCAL_SCOPE_REGISTER = aarch64::Register(aarch64::X11);
62 const aarch64::Register RETURN_REGISTER = aarch64::Register(aarch64::X0);
63 void MovParameterIntoParamReg(MacroParameter param, aarch64::Register paramReg);
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/arkcompiler/ets_runtime/ecmascript/compiler/trampoline/x64/
Dcommon_call.h7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
40 static void CopyArgumentWithArgV(ExtendedAssembler *assembler, Register argc, Register argV);
43 static void PushUndefinedWithArgc(ExtendedAssembler *assembler, Register argc);
45 …hArgsWithArgvAndCheckStack(ExtendedAssembler *assembler, Register glue, Register argc, Register ar…
46 Register op1, Register op2, Label *stackOverflow);
47 …c void StackOverflowCheck(ExtendedAssembler *assembler, Register glue, Register numArgs, Register …
48 Register op2, Label *stackOverflow);
86 static void JSCallCheck(ExtendedAssembler *assembler, Register jsFuncReg,
88 static void ThrowNonCallableInternal(ExtendedAssembler *assembler, Register glueReg);
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Dcommon_call.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
30 #define __ assembler->
32 void CommonCall::CopyArgumentWithArgV(ExtendedAssembler *assembler, Register argc, Register argV) in CopyArgumentWithArgV()
35 Register arg = __ AvailableRegister1(); in CopyArgumentWithArgV()
37 __ Movq(Operand(argV, argc, Scale::Times8, -FRAME_SLOT_SIZE), arg); // -8: stack index in CopyArgumentWithArgV()
51 if (!assembler->FromInterpreterHandler()) { in PushAsmInterpBridgeFrame()
58 Register r13 = __ CppJSCallAvailableRegister1(); in GetArgvAtStack()
59 Register r14 = __ CppJSCallAvailableRegister2(); in GetArgvAtStack()
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Dasm_interpreter_call.cpp2 * Copyright (c) 2022-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
33 #define __ assembler->
36 // Input: glue - %rdi
37 // callTarget - %rsi
38 // method - %rdx
39 // callField - %rcx
40 // argc - %r8
41 // argv - %r9(<callTarget, newTarget, this> are at the beginning of argv)
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/arkcompiler/ets_runtime/ecmascript/compiler/assembler/tests/
Dassembler_aarch64_test.cpp7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
25 #include "llvm-c/Analysis.h"
26 #include "llvm-c/Core.h"
27 #include "llvm-c/Disassembler.h"
28 #include "llvm-c/ExecutionEngine.h"
29 #include "llvm-c/Target.h"
50 chunk_ = thread->GetEcmaVM()->GetChunk(); in SetUp()
92 uint8_t *byteSp = assemlber->GetBegin(); in DisassembleChunk()
93 size_t numBytes = assemlber->GetCurrentPosition(); in DisassembleChunk()
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/arkcompiler/runtime_core/static_core/compiler/tests/
Dspill_fill_encoder_test.cpp2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
28 // NOLINTBEGIN(readability-magic-numbers)
32 {{LocationType::REGISTER, LocationType::STACK, 1U, 0U, DataType::Type::INT64}, in TEST_F()
33 {LocationType::REGISTER, LocationType::STACK, 0U, 2U, DataType::Type::INT64}, in TEST_F()
34 {LocationType::REGISTER, LocationType::REGISTER, 0U, 1U, DataType::Type::INT64}, in TEST_F()
35 {LocationType::REGISTER, LocationType::REGISTER, 1U, 2U, DataType::Type::INT64}, in TEST_F()
36 {LocationType::IMMEDIATE, LocationType::REGISTER, 0U, 0U, DataType::Type::INT64}, in TEST_F()
37 {LocationType::IMMEDIATE, LocationType::REGISTER, 0U, 1U, DataType::Type::INT64}, in TEST_F()
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/arkcompiler/runtime_core/static_core/verification/models/contexts_merge/
Dcheck_set_intersection_as_lub.als2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
19 fact Validity {all r: Register | r.Valid }
22 fun SuperTypesIntersection[regs: set Register] : set Type
25 -- Correct subtyping definition:
26 -- exists some type in set of types,
27 -- which is a subtype of register type
28 pred CorrectSubtyping[r: Register, types: set Type]
31 -- check that one reg type may be used as substitutuion for the other
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/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/
Dcfi.def7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
17 /* https://sourceware.org/binutils/docs-2.28/as/CFI-directives.html#CFI-directives */
32 CFI_DEFINE( def_cfa, , 2, Register, Immediate, Undef )
33 CFI_DEFINE( def_cfa_register, , 1, Register, Undef, Undef )
36 CFI_DEFINE( offset, , 2, Register, Immediate, Undef )
37 CFI_DEFINE( val_offset, , 2, Register, Immediate, Undef )
38 CFI_DEFINE( rel_offset, , 2, Register, Immediate, Undef )
39 CFI_DEFINE( register, , 2, Register, Register, Undef )
40 CFI_DEFINE( restore, , 1, Register, Undef, Undef )
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/arkcompiler/runtime_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.h2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
28 …* equal to the number of given registers and save map to restore actual codegen register number fr…
29 * register number.
32 * - there are 3 available registers: r16, r18, r20;
33 * - r18 has priority to be assigned;
35 * - `codegen_reg_map_` will be equal to [18, 20, 16]
36 …* - RegAlloc locally assigns registers with numbers 0, 1 and 2 and then replace them by the codege…
41 explicit RegisterMap(ArenaAllocator *allocator) : codegen_reg_map_(allocator->Adapter()) {} in RegisterMap()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/regalloc/
Dreg_map.h2 * Copyright (c) 2021-2024 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
28 …* equal to the number of given registers and save map to restore actual codegen register number fr…
29 * register number.
32 * - there are 3 available registers: r16, r18, r20;
33 * - r18 has priority to be assigned;
35 * - `codegen_reg_map_` will be equal to [18, 20, 16]
36 …* - RegAlloc locally assigns registers with numbers 0, 1 and 2 and then replace them by the codege…
41 explicit RegisterMap(ArenaAllocator *allocator) : codegenRegMap_(allocator->Adapter()) {} in RegisterMap()
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/arkcompiler/runtime_core/static_core/compiler/docs/
Dreg_alloc_linear_scan_doc.md1 # Register allocator
4 `Register allocator` assigns program variables to target CPU registers
17 Current algorithm is based on paper "Linear Scan Register Allocation" by Massimiliano Poletto. Ther…
19 ### Assigning registers and stack slots to the instructions' intervals
21 …Register allocator` works with instructions' lifetime intervals, computed by `LivenessAnalyzer`. I…
22 interval to the stack. Intervals for general and vector registers are independent.
28 At this point register allocator resolves location for each instruction's input depending on regist…
30 …hat ends before the user and the segment that starts at the user) and a register is preferred over…
36 #### Adding spill-fill instructions
51 REGISTER = 1,
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Dreg_alloc_graph_coloring_doc.md1 # AOT Register allocator
4 `Register allocator` assigns program variables to target CPU registers
14 # Register allocation on Chordal-graphs with advanced register coalescing
15 Register allocation algorithm by Evgeny Erokhin.
17 This paper describes register allocation algorithm that is based on ideas of Chordal-graph coloring…
18 …register allocation on Chordal-graphs is described in works of Sebastian Hack and Fernando Pereira…
19 In works of Hack ("Register Allocation for Programs in SSA Form") and Pereira ("Register Allocation…
20 …to sequential numbering) in order <caller-saved, callee-saved>. In fact because these values with …
23 …-intervals, algorithm under the hood is the same as in Linear-scan from works of Wimmer ("Linear S…
26 …-colored, this value is set as pre-color for node. And input parameters is marked for split if it …
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/arkcompiler/runtime_core/bytecode_optimizer/
Dreg_encoder.h2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
25 * Register Encoder.
27 * After compiler's register allocation layout of the virtual frame looks like:
29 * |<-locals->|<-free registers->|<-RegAlloc temps->|<-arguments->|
34 * * temps (>= 0) are temporary registers that can be allocated by spill-fill
38 * The size of the frame is fixed (see register allocator for details).
43 * to an unused argument).
45 * For locals and temps, it is not guaranteed that their number equals to the
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Dreg_encoder.cpp2 * Copyright (c) 2021-2022 Huawei Device Co., Ltd.
7 * http://www.apache.org/licenses/LICENSE-2.0
9 * Unless required by applicable law or agreed to in writing, software
24 if (inst->GetOpcode() != compiler::Opcode::Intrinsic) { in IsIntrinsicRange()
28 switch (inst->CastToIntrinsic()->GetIntrinsicId()) { in IsIntrinsicRange()
52 switch (inst->GetOpcode()) { in CanHoldRange()
60 static compiler::Register CalculateNumNeededRangeTemps(const compiler::Graph *graph) in CalculateNumNeededRangeTemps()
62 compiler::Register ret = 0; in CalculateNumNeededRangeTemps()
64 for (auto bb : graph->GetBlocksRPO()) { in CalculateNumNeededRangeTemps()
65 for (const auto &inst : bb->AllInsts()) { in CalculateNumNeededRangeTemps()
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/arkcompiler/runtime_core/compiler/docs/
Dreg_alloc_graph_coloring_doc.md1 # AOT Register allocator
4 `Register allocator` assigns program variables to target CPU registers
14 # Register allocation on Chordal-graphs with advanced register coalescing
15 Register allocation algorithm by Evgeny Erokhin.
17 This paper describes register allocation algorithm that is based on ideas of Chordal-graph coloring…
18 …register allocation on Chordal-graphs is described in works of Sebastian Hack and Fernando Pereira…
19 In works of Hack ("Register Allocation for Programs in SSA Form") and Pereira ("Register Allocation…
20 …to sequential numbering) in order <caller-saved, callee-saved>. In fact because these values with …
23 …-intervals, algorithm under the hood is the same as in Linear-scan from works of Wimmer ("Linear S…
26 …-colored, this value is set as pre-color for node. And input parameters is marked for split if it …
[all …]

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