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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dsynopsys-dw-mshc-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: mmc-controller.yaml#
13 - Ulf Hansson <ulf.hansson@linaro.org>
20 reset-names:
23 clock-frequency:
29 fifo-depth:
31 The maximum size of the tx/rx fifo's. If this property is not
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsynopsys-dw-mshc-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "mmc-controller.yaml#"
13 - Ulf Hansson <ulf.hansson@linaro.org>
20 reset-names:
23 clock-frequency:
29 fifo-depth:
31 The maximum size of the tx/rx fifo's. If this property is not
[all …]
/kernel/linux/linux-6.6/include/linux/amba/
Dpl022.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
30 * enum ssp_interface - interfaces allowed for this SSP Controller
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
81 * enum ssp_data_size - number of bits in one data element
97 * enum ssp_mode - SSP mode of operation (Communication modes)
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/kernel/linux/linux-5.10/include/linux/amba/
Dpl022.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
30 * enum ssp_interface - interfaces allowed for this SSP Controller
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
81 * enum ssp_data_size - number of bits in one data element
97 * enum ssp_mode - SSP mode of operation (Communication modes)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-pl022.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: "spi-controller.yaml#"
22 - compatible
27 - const: arm,pl022
28 - const: arm,primecell
39 clock-names:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dspi-pl022.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: spi-controller.yaml#
14 - $ref: /schemas/arm/primecell.yaml#
23 - compatible
28 - const: arm,pl022
29 - const: arm,primecell
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dcdns,macb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 - items:
17 - enum:
18 - cdns,at91rm9200-emac # Atmel at91rm9200 SoC
19 - const: cdns,emac # Generic
21 - items:
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/kernel/linux/linux-6.6/drivers/tty/serial/
Dsifive.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2018-2019 SiFive
8 * - drivers/tty/serial/pxa.c
9 * - drivers/tty/serial/amba-pl011.c
10 * - drivers/tty/serial/uartlite.c
11 * - drivers/tty/serial/omap-serial.c
12 * - drivers/pwm/pwm-sifive.c
15 * - Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of
16 * SiFive FE310-G000 v2p3
17 * - The tree/master/src/main/scala/devices/uart directory of
[all …]
Dmsm_serial.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
192 writel_relaxed(val, port->membase + off); in msm_write()
198 return readl_relaxed(port->membase + off); in msm_read()
210 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
222 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
233 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
236 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
238 else if (port->uartclk == 4800000) in msm_serial_set_mnd_regs()
247 struct device *dev = port->dev; in msm_stop_dma()
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-fsl-lpspi.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/dma-mapping.h>
22 #include <linux/dma/imx-dma.h>
34 #define FSL_LPSPI_MAX_EDMA_BYTES ((1 << 15) - 1)
106 void (*rx)(struct fsl_lpspi_data *); member
109 u8 watermark; member
125 { .compatible = "fsl,imx7ulp-spi", },
133 unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
135 if (fsl_lpspi->rx_buf) { \
136 *(type *)fsl_lpspi->rx_buf = val; \
[all …]
Dspi-sifive.c1 // SPDX-License-Identifier: GPL-2.0
35 #define SIFIVE_SPI_REG_RXDATA 0x4c /* Rx FIFO data */
36 #define SIFIVE_SPI_REG_TXMARK 0x50 /* Tx FIFO watermark */
37 #define SIFIVE_SPI_REG_RXMARK 0x54 /* Rx FIFO watermark */
96 struct completion done; /* wake-up from interrupt */
101 iowrite32(value, spi->regs + offset); in sifive_spi_write()
106 return ioread32(spi->regs + offset); in sifive_spi_read()
111 /* Watermark interrupts are disabled by default */ in sifive_spi_init()
114 /* Default watermark FIFO threshold values */ in sifive_spi_init()
126 /* Exit specialized memory-mapped SPI flash mode */ in sifive_spi_init()
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-fsl-lpspi.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/dma-mapping.h>
23 #include <linux/platform_data/dma-imx.h>
35 #define FSL_LPSPI_MAX_EDMA_BYTES ((1 << 15) - 1)
107 void (*rx)(struct fsl_lpspi_data *); member
110 u8 watermark; member
126 { .compatible = "fsl,imx7ulp-spi", },
134 unsigned int val = readl(fsl_lpspi->base + IMX7ULP_RDR); \
136 if (fsl_lpspi->rx_buf) { \
137 *(type *)fsl_lpspi->rx_buf = val; \
[all …]
Dspi-sifive.c1 // SPDX-License-Identifier: GPL-2.0
35 #define SIFIVE_SPI_REG_RXDATA 0x4c /* Rx FIFO data */
36 #define SIFIVE_SPI_REG_TXMARK 0x50 /* Tx FIFO watermark */
37 #define SIFIVE_SPI_REG_RXMARK 0x54 /* Rx FIFO watermark */
96 struct completion done; /* wake-up from interrupt */
101 iowrite32(value, spi->regs + offset); in sifive_spi_write()
106 return ioread32(spi->regs + offset); in sifive_spi_read()
111 /* Watermark interrupts are disabled by default */ in sifive_spi_init()
114 /* Default watermark FIFO threshold values */ in sifive_spi_init()
126 /* Exit specialized memory-mapped SPI flash mode */ in sifive_spi_init()
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dsifive.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2018-2019 SiFive
18 * - drivers/tty/serial/pxa.c
19 * - drivers/tty/serial/amba-pl011.c
20 * - drivers/tty/serial/uartlite.c
21 * - drivers/tty/serial/omap-serial.c
22 * - drivers/pwm/pwm-sifive.c
25 * - Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of
26 * SiFive FE310-G000 v2p3
27 * - The tree/master/src/main/scala/devices/uart directory of
[all …]
Dmsm_serial.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
188 writel_relaxed(val, port->membase + off); in msm_write()
194 return readl_relaxed(port->membase + off); in msm_read()
206 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
218 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
229 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
232 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
234 else if (port->uartclk == 4800000) in msm_serial_set_mnd_regs()
243 struct device *dev = port->dev; in msm_stop_dma()
[all …]
/kernel/linux/linux-5.10/Documentation/hid/
Dintel-ish-hid.rst6 processing to a dedicated low power co-processor. This allows the core
27 ----------------- ----------------------
28 | USB HID | --> | ISH HID |
29 ----------------- ----------------------
30 ----------------- ----------------------
31 | USB protocol | --> | ISH Transport |
32 ----------------- ----------------------
33 ----------------- ----------------------
34 | EHCI/XHCI | --> | ISH IPC |
35 ----------------- ----------------------
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/kernel/linux/linux-6.6/Documentation/hid/
Dintel-ish-hid.rst6 processing to a dedicated low power co-processor. This allows the core
11 Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops
27 ----------------- ----------------------
28 | USB HID | --> | ISH HID |
29 ----------------- ----------------------
30 ----------------- ----------------------
31 | USB protocol | --> | ISH Transport |
32 ----------------- ----------------------
33 ----------------- ----------------------
34 | EHCI/XHCI | --> | ISH IPC |
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/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/toshiba/
Dspider_net.rst1 .. SPDX-License-Identifier: GPL-2.0
18 The Structure of the RX Ring.
20 The receive (RX) ring is a circular linked list of RX descriptors,
29 "full" and "not-in-use". An "empty" or "ready" descriptor is ready
31 and is waiting to be emptied and processed by the OS. A "not-in-use"
36 spidernet device driver) allocates a set of RX descriptors and RX
40 buffers, processing them, and re-marking them empty.
47 flowing RX traffic, every descr behind it should be marked "full",
54 descr. The OS will process this descr, and then mark it "not-in-use",
55 and advance the tail pointer. Thus, when there is flowing RX traffic,
[all …]
/kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/toshiba/
Dspider_net.rst1 .. SPDX-License-Identifier: GPL-2.0
18 The Structure of the RX Ring.
20 The receive (RX) ring is a circular linked list of RX descriptors,
29 "full" and "not-in-use". An "empty" or "ready" descriptor is ready
31 and is waiting to be emptied and processed by the OS. A "not-in-use"
36 spidernet device driver) allocates a set of RX descriptors and RX
40 buffers, processing them, and re-marking them empty.
47 flowing RX traffic, every descr behind it should be marked "full",
54 descr. The OS will process this descr, and then mark it "not-in-use",
55 and advance the tail pointer. Thus, when there is flowing RX traffic,
[all …]
/kernel/linux/linux-5.10/drivers/net/wimax/i2400m/
Di2400m-usb.h3 * USB-specific i2400m driver definitions
6 * Copyright (C) 2007-2008 Intel Corporation. All rights reserved.
35 * Intel Corporation <linux-wimax@intel.com>
36 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
38 * - Initial implementation
41 * This driver implements the bus-specific part of the i2400m for
47 * endpoint (in usb-notif.c); when data is ready to read, the code in
48 * there schedules a read from the device (usb-rx.c) and then passes
49 * the data to the generic RX code (rx.c).
53 * through the i2400m->bus_tx_kick() callback
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap1/
Dserial.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap1/serial.c
21 #include <asm/mach-types.h>
36 offset <<= up->regshift; in omap_serial_in()
37 return (unsigned int)__raw_readb(up->membase + offset); in omap_serial_in()
43 offset <<= p->regshift; in omap_serial_outp()
44 __raw_writeb(value, p->membase + offset); in omap_serial_outp()
49 * properly. Note that the TX watermark initialization may not be needed
50 * once the 8250.c watermark handling code is merged.
56 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ in omap_serial_reset()
[all …]
/kernel/linux/linux-6.6/Documentation/trace/
Dhisi-ptt.rst1 .. SPDX-License-Identifier: GPL-2.0
23 +--------------Core 0-------+
25 | | [Root Port]---[Endpoint]
26 | | [Root Port]---[Endpoint]
27 | | [Root Port]---[Endpoint]
28 Root Complex |------Core 1-------+
30 | | [Root Port]---[ Switch ]---[Endpoint]
31 | | [Root Port]---[Endpoint] `-[Endpoint]
32 | | [Root Port]---[Endpoint]
33 +---------------------------+
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dserial.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-omap1/serial.c
20 #include <asm/mach-types.h>
34 offset <<= up->regshift; in omap_serial_in()
35 return (unsigned int)__raw_readb(up->membase + offset); in omap_serial_in()
41 offset <<= p->regshift; in omap_serial_outp()
42 __raw_writeb(value, p->membase + offset); in omap_serial_outp()
47 * properly. Note that the TX watermark initialization may not be needed
48 * once the 8250.c watermark handling code is merged.
54 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ in omap_serial_reset()
[all …]
/kernel/linux/linux-6.6/sound/pci/ice1712/
Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
81 #define VT1724_REG_MPU_RXFIFO 0x0b /*byte ro. number of bytes in RX fifo*/
91 #define VT1724_REG_MPU_FIFO_WM 0x0e /*byte set the high/low watermarks for RX/TX fifos*/
92 #define VT1724_MPU_RX_FIFO 0x20 //1=rx fifo watermark 0=tx fifo watermark
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
[all …]
/kernel/linux/linux-5.10/sound/pci/ice1712/
Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
81 #define VT1724_REG_MPU_RXFIFO 0x0b /*byte ro. number of bytes in RX fifo*/
91 #define VT1724_REG_MPU_FIFO_WM 0x0e /*byte set the high/low watermarks for RX/TX fifos*/
92 #define VT1724_MPU_RX_FIFO 0x20 //1=rx fifo watermark 0=tx fifo watermark
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
[all …]

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