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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dallwinner,sun6i-a31-msgbox.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Samuel Holland <samuel@sholland.org>
13 The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a
14 two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt
17 hold four 32-bit messages; when a FIFO is full, clients must wait before
20 Refer to ./mailbox.txt for generic information about mailbox device-tree
26 - items:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Dallwinner,sun6i-a31-msgbox.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Samuel Holland <samuel@sholland.org>
13 The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a
14 two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt
17 hold four 32-bit messages; when a FIFO is full, clients must wait before
20 Refer to ./mailbox.txt for generic information about mailbox device-tree
26 - items:
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-tcon-top.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/thermal/thermal.h>
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Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/kernel/linux/linux-6.6/arch/arm/boot/dts/allwinner/
Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun6i-rtc.h>
44 #include <dt-bindings/clock/sun8i-de2.h>
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/reset/sun8i-de2.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 interrupt-parent = <&gic>;
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Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-de2.h>
44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/reset/sun8i-de2.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
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Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/allwinner/
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
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Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
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/kernel/linux/linux-5.10/drivers/mailbox/
Dsun6i-msgbox.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2017-2019 Samuel Holland <samuel@sholland.org>
44 #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__)
58 return chan - chan->mbox->chans; in channel_number()
63 return chan->con_priv; in to_sun6i_msgbox()
73 status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & in sun6i_msgbox_irq()
74 readl(mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
80 struct mbox_chan *chan = &mbox->controller.chans[n]; in sun6i_msgbox_irq()
86 uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); in sun6i_msgbox_irq()
93 writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
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/kernel/linux/linux-6.6/drivers/mailbox/
Dsun6i-msgbox.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2017-2019 Samuel Holland <samuel@sholland.org>
44 #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__)
58 return chan - chan->mbox->chans; in channel_number()
63 return chan->con_priv; in to_sun6i_msgbox()
73 status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & in sun6i_msgbox_irq()
74 readl(mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
80 struct mbox_chan *chan = &mbox->controller.chans[n]; in sun6i_msgbox_irq()
86 uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); in sun6i_msgbox_irq()
93 writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
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/kernel/linux/linux-6.6/drivers/irqchip/
Dirq-sun6i-r.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * The R_INTC in Allwinner A31 and newer SoCs manages several types of
7 * bit 0 bits 1-15^ bits 19-31
9 * +---------+ +---------+ +---------+ +---------+
11 * +---------+ +---------+ +---------+ +---------+
14 * +------V------+ +------------+ | | | +--V------V--+ |
17 * +-------------+ +------------+ | | | +------------+ |
19 * +--V-------V--+ +--V--+ | +--V--+ | +--V--+
22 * +-------------+ | N+d | | | m | | | m+7 |
23 * | | +-----+ | +-----+ | +-----+
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