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/kernel/linux/linux-6.6/Documentation/networking/dsa/
Dsja1105.rst2 NXP SJA1105 switch driver
8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17 100base-TX PHYs
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Lan966x Ethernet switch controller
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
[all …]
Dxlnx,axi-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 interfaces: MII, GMII, RGMII, SGMII, 1000BaseX. It also includes two
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
35 axistream-connected is specified, in which case the reg
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-ipq806x.c36 #define NSS_COMMON_CLK_GATE_PTP_EN(x) BIT(0x10 + x) argument
37 #define NSS_COMMON_CLK_GATE_RGMII_RX_EN(x) BIT(0x9 + (x * 2)) argument
38 #define NSS_COMMON_CLK_GATE_RGMII_TX_EN(x) BIT(0x8 + (x * 2)) argument
39 #define NSS_COMMON_CLK_GATE_GMII_RX_EN(x) BIT(0x4 + x) argument
40 #define NSS_COMMON_CLK_GATE_GMII_TX_EN(x) BIT(0x0 + x) argument
43 #define NSS_COMMON_CLK_DIV_OFFSET(x) (x * 8) argument
47 #define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x) argument
50 * MAC1: QSGMII=0 SGMII=0 RGMII=1
51 * MAC2 & MAC3: QSGMII=0 SGMII=1
53 #define NSS_COMMON_CLK_SRC_CTRL_RGMII(x) 1 argument
[all …]
/kernel/linux/linux-6.6/arch/mips/cavium-octeon/executive/
Dcvmx-helper-sgmii.c7 * Copyright (C) 2003-2018 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 * Functions for SGMII initialization, configuration,
35 #include <asm/octeon/cvmx-config.h>
37 #include <asm/octeon/cvmx-helper.h>
38 #include <asm/octeon/cvmx-helper-board.h>
40 #include <asm/octeon/cvmx-gmxx-defs.h>
41 #include <asm/octeon/cvmx-pcsx-defs.h>
42 #include <asm/octeon/cvmx-pcsxx-defs.h>
[all …]
/kernel/linux/linux-5.10/arch/mips/cavium-octeon/executive/
Dcvmx-helper-sgmii.c7 * Copyright (C) 2003-2018 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 * Functions for SGMII initialization, configuration,
35 #include <asm/octeon/cvmx-config.h>
37 #include <asm/octeon/cvmx-helper.h>
38 #include <asm/octeon/cvmx-helper-board.h>
40 #include <asm/octeon/cvmx-gmxx-defs.h>
41 #include <asm/octeon/cvmx-pcsx-defs.h>
42 #include <asm/octeon/cvmx-pcsxx-defs.h>
[all …]
/kernel/linux/linux-5.10/drivers/net/pcs/
Dpcs-lynx.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <linux/pcs-lynx.h>
13 #define SGMII_AN_LINK_TIMER_NS 1600000 /* defined by SGMII spec */
20 #define IF_MODE_SPEED(x) (((x) << 2) & GENMASK(3, 2)) argument
36 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii()
37 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
44 state->link = !!(status & MDIO_STAT1_LSTATUS); in lynx_pcs_get_state_usxgmii()
45 state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE); in lynx_pcs_get_state_usxgmii()
46 if (!state->link || !state->an_complete) in lynx_pcs_get_state_usxgmii()
59 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_2500basex()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/qualcomm/emac/
Demac-sgmii.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
5 /* Qualcomm Technologies, Inc. EMAC SGMII Controller driver.
15 #include "emac-mac.h"
16 #include "emac-sgmii.h"
52 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->init)) in emac_sgmii_init()
55 return adpt->phy.sgmii_ops->init(adpt); in emac_sgmii_init()
60 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->open)) in emac_sgmii_open()
63 return adpt->phy.sgmii_ops->open(adpt); in emac_sgmii_open()
68 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->close)) in emac_sgmii_close()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/qualcomm/emac/
Demac-sgmii.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
5 /* Qualcomm Technologies, Inc. EMAC SGMII Controller driver.
13 #include "emac-mac.h"
14 #include "emac-sgmii.h"
50 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->init)) in emac_sgmii_init()
53 return adpt->phy.sgmii_ops->init(adpt); in emac_sgmii_init()
58 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->open)) in emac_sgmii_open()
61 return adpt->phy.sgmii_ops->open(adpt); in emac_sgmii_open()
66 if (!(adpt->phy.sgmii_ops && adpt->phy.sgmii_ops->close)) in emac_sgmii_close()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-ipq806x.c34 #define NSS_COMMON_CLK_GATE_PTP_EN(x) BIT(0x10 + x) argument
35 #define NSS_COMMON_CLK_GATE_RGMII_RX_EN(x) BIT(0x9 + (x * 2)) argument
36 #define NSS_COMMON_CLK_GATE_RGMII_TX_EN(x) BIT(0x8 + (x * 2)) argument
37 #define NSS_COMMON_CLK_GATE_GMII_RX_EN(x) BIT(0x4 + x) argument
38 #define NSS_COMMON_CLK_GATE_GMII_TX_EN(x) BIT(0x0 + x) argument
41 #define NSS_COMMON_CLK_DIV_OFFSET(x) (x * 8) argument
45 #define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x) argument
48 * MAC1: QSGMII=0 SGMII=0 RGMII=1
49 * MAC2 & MAC3: QSGMII=0 SGMII=1
51 #define NSS_COMMON_CLK_SRC_CTRL_RGMII(x) 1 argument
[all …]
/kernel/linux/linux-6.6/drivers/net/phy/
Ddp83867.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/nvmem-consumer.h>
19 #include <dt-bindings/net/ti-dp83867.h>
159 #define DP83867_LED_DRV_EN(x) BIT((x) * 4) argument
160 #define DP83867_LED_DRV_VAL(x) BIT((x) * 4 + 1) argument
194 struct net_device *ndev = phydev->attached_dev; in dp83867_set_wol()
201 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83867_set_wol()
206 if (wol->wolopts & WAKE_MAGIC) { in dp83867_set_wol()
207 mac = (const u8 *)ndev->dev_addr; in dp83867_set_wol()
210 return -EINVAL; in dp83867_set_wol()
[all …]
Dmxl-gpy.c1 // SPDX-License-Identifier: GPL-2.0+
52 #define PHY_IMASK_WOL BIT(15) /* Wake-on-LAN */
53 #define PHY_IMASK_ANC BIT(10) /* Auto-Neg complete */
54 #define PHY_IMASK_ADSC BIT(5) /* Link auto-downspeed detect */
75 /* SGMII */
111 /* It takes 3 seconds to fully switch out of loopback mode before
112 * it can safely re-enter loopback mode. Record the time when
132 * T = -2.5761e-11*(N^4) + 9.7332e-8*(N^3) + -1.9165e-4*(N^2) +
133 * 3.0762e-1*(N^1) + -5.2156e1
135 * where [-52.156, 137.961]C and N = [0, 1023].
[all …]
Dmarvell-88x2222.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Marvell 88x2222 dual-port multi-speed ethernet transceiver.
7 * 1000Base-X or 10GBase-R on the line side.
8 * SGMII over 1000Base-X.
38 /* 1000Base-X/SGMII Control Register */
41 /* 1000BASE-X/SGMII Status Register */
44 /* 1000Base-X Auto-Negotiation Advertisement Register */
47 /* 1000Base-X PHY Specific Status Register */
112 struct mv2222_data *priv = phydev->priv; in mv2222_set_sgmii_speed()
114 switch (phydev->speed) { in mv2222_set_sgmii_speed()
[all …]
/kernel/linux/linux-6.6/drivers/net/pcs/
Dpcs-lynx.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <linux/pcs-lynx.h>
19 #define IF_MODE_SPEED(x) (((x) << 2) & GENMASK(3, 2)) argument
36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs)
41 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii()
42 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
49 state->link = !!(status & MDIO_STAT1_LSTATUS); in lynx_pcs_get_state_usxgmii()
50 state->an_complete = !!(status & MDIO_AN_STAT1_COMPLETE); in lynx_pcs_get_state_usxgmii()
51 if (!state->link || !state->an_complete) in lynx_pcs_get_state_usxgmii()
69 state->link = false; in lynx_pcs_get_state_2500basex()
[all …]
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
14 #include "pcs-xpcs.h"
167 const struct xpcs_compat *compat = &id->compat[i]; in xpcs_find_compat()
169 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
170 if (compat->interface[j] == interface) in xpcs_find_compat()
181 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_get_an_mode()
183 return -ENODEV; in xpcs_get_an_mode()
185 return compat->an_mode; in xpcs_get_an_mode()
194 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/ti/
Dnetcp_sgmii.c1 // SPDX-License-Identifier: GPL-2.0
7 * Sandeep Paulraj <s-paulraj@ti.com>
8 * Wingman Kwok <w-kwok2@ti.com>
22 #define SGMII23_OFFSET(x) ((x - 2) * 0x100) argument
23 #define SGMII_OFFSET(x) ((x <= 1) ? (x * 0x100) : (SGMII23_OFFSET(x))) argument
25 /* SGMII registers */
26 #define SGMII_SRESET_REG(x) (SGMII_OFFSET(x) + 0x004) argument
27 #define SGMII_CTL_REG(x) (SGMII_OFFSET(x) + 0x010) argument
28 #define SGMII_STATUS_REG(x) (SGMII_OFFSET(x) + 0x014) argument
29 #define SGMII_MRADV_REG(x) (SGMII_OFFSET(x) + 0x018) argument
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/ti/
Dnetcp_sgmii.c1 // SPDX-License-Identifier: GPL-2.0
7 * Sandeep Paulraj <s-paulraj@ti.com>
8 * Wingman Kwok <w-kwok2@ti.com>
22 #define SGMII23_OFFSET(x) ((x - 2) * 0x100) argument
23 #define SGMII_OFFSET(x) ((x <= 1) ? (x * 0x100) : (SGMII23_OFFSET(x))) argument
25 /* SGMII registers */
26 #define SGMII_SRESET_REG(x) (SGMII_OFFSET(x) + 0x004) argument
27 #define SGMII_CTL_REG(x) (SGMII_OFFSET(x) + 0x010) argument
28 #define SGMII_STATUS_REG(x) (SGMII_OFFSET(x) + 0x014) argument
29 #define SGMII_MRADV_REG(x) (SGMII_OFFSET(x) + 0x018) argument
[all …]
/kernel/linux/linux-6.6/drivers/net/dsa/b53/
Db53_serdes.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Northstar Plus switch SerDes/SGMII PHY main logic
44 if (dev->serdes_lane == lane) in b53_serdes_set_lane()
51 dev->serdes_lane = lane; in b53_serdes_set_lane()
73 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_config()
74 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_config()
91 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_an_restart()
92 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_an_restart()
105 struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev; in b53_serdes_get_state()
106 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_get_state()
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Ddp83867.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <dt-bindings/net/ti-dp83867.h>
185 struct net_device *ndev = phydev->attached_dev; in dp83867_set_wol()
192 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83867_set_wol()
197 if (wol->wolopts & WAKE_MAGIC) { in dp83867_set_wol()
198 mac = (u8 *)ndev->dev_addr; in dp83867_set_wol()
201 return -EINVAL; in dp83867_set_wol()
215 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83867_set_wol()
217 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83867_set_wol()
219 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83867_set_wol()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/dsa/
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Ocelot Switch Family
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
20 them performs packet I/O primarily through an Ethernet port of the switch
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Docelot.txt1 Microchip Ocelot switch driver family
5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
12 The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
34 use case. Moving the NPI port to an external switch port is hardware possible,
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/igb/
De1000_82575.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
61 * igb_write_vfta_i350 - Write value to VLAN filter table
71 struct igb_adapter *adapter = hw->back; in igb_write_vfta_i350()
74 for (i = 10; i--;) in igb_write_vfta_i350()
78 adapter->shadow_vfta[offset] = value; in igb_write_vfta_i350()
82 * igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
93 switch (hw->mac.type) { in igb_sgmii_uses_mdio_82575()
114 * igb_check_for_link_media_swap - Check which M88E1112 interface linked
121 struct e1000_phy_info *phy = &hw->phy; in igb_check_for_link_media_swap()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/igb/
De1000_82575.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
61 * igb_write_vfta_i350 - Write value to VLAN filter table
71 struct igb_adapter *adapter = hw->back; in igb_write_vfta_i350()
74 for (i = 10; i--;) in igb_write_vfta_i350()
78 adapter->shadow_vfta[offset] = value; in igb_write_vfta_i350()
82 * igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
93 switch (hw->mac.type) { in igb_sgmii_uses_mdio_82575()
114 * igb_check_for_link_media_swap - Check which M88E1112 interface linked
121 struct e1000_phy_info *phy = &hw->phy; in igb_check_for_link_media_swap()
[all …]
/kernel/linux/linux-6.6/include/linux/
Dphylink.h22 MLO_AN_FIXED, /* Fixed-link mode */
23 MLO_AN_INBAND, /* In-band protocol */
26 * PHYLINK_PCS_NEG_NONE - protocol has no inband capability
27 * PHYLINK_PCS_NEG_OUTBAND - some out of band or fixed link setting
28 * PHYLINK_PCS_NEG_INBAND_DISABLED - inband mode disabled, e.g.
29 * 1000base-X with autoneg off
30 * PHYLINK_PCS_NEG_INBAND_ENABLED - inband mode enabled
32 * PHYLINK_PCS_NEG_INBAND - inband mode selected
33 * PHYLINK_PCS_NEG_ENABLED - negotiation mode enabled
102 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
[all …]
/kernel/linux/linux-6.6/Documentation/ABI/testing/
Dsysfs-class-net-phydev24 This attribute contains the 32-bit PHY Identifier as reported
41 <empty> (not available), mii, gmii, sgmii, tbi, rev-mii,
42 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
44 xaui, 10gbase-kr, unknown
60 32-bit hexadecimal number representing a bit mask of the
62 (Ethernet MAC, switch, etc.) to the PHY driver. The flags are

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