Searched refs:kFloatDataProcessing1 (Results 1 – 3 of 3) sorted by relevance
| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/aarch64/ |
| D | aarch64_md.def | 41 …dDesc::Reg32FD,&OpndDesc::Reg32FS},ISMOVE,kLtFpalu,"fmov","0,1",1,kFloatDataProcessing1,0x1e204000)
43 …dDesc::Reg64FD,&OpndDesc::Reg64FS},ISMOVE,kLtFpalu,"fmov","0,1",1,kFloatDataProcessing1,0x1e604000)
196 …:Reg32FD,&OpndDesc::Reg64FS},ISCONVERSION,kLtFpalu,"fcvt","0,1",1,kFloatDataProcessing1,0x1e624000)
198 …:Reg64FD,&OpndDesc::Reg32FS},ISCONVERSION,kLtFpalu,"fcvt","0,1",1,kFloatDataProcessing1,0x1e22c000)
430 …{&OpndDesc::Reg32FD,&OpndDesc::Reg32FS},0,kLtFpalu,"fabs","0,1",1,kFloatDataProcessing1,0x1e20c000)
432 …{&OpndDesc::Reg64FD,&OpndDesc::Reg64FS},0,kLtFpalu,"fabs","0,1",1,kFloatDataProcessing1,0x1e60c000)
443 …{&OpndDesc::Reg32FD,&OpndDesc::Reg32FS},0,kLtFpalu,"fneg","0,1",1,kFloatDataProcessing1,0x1e214000)
445 …{&OpndDesc::Reg64FD,&OpndDesc::Reg64FS},0,kLtFpalu,"fneg","0,1",1,kFloatDataProcessing1,0x1e614000)
625 …g32FD,&OpndDesc::Reg32FS},CANTHROW,kLtAdvsimdDivS,"fsqrt","0,1",1,kFloatDataProcessing1,0x1e21c000)
627 …g64FD,&OpndDesc::Reg64FS},CANTHROW,kLtAdvsimdDivD,"fsqrt","0,1",1,kFloatDataProcessing1,0x1e61c000)
[all …]
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/ |
| D | isa.h | 162 kFloatDataProcessing1, enumerator
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/aarch64/ |
| D | aarch64_obj_emitter.cpp | 417 case kFloatDataProcessing1: in GetBinaryCodeForInsn()
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