Searched refs:kBaseOpcodeMask (Results 1 – 5 of 5) sorted by relevance
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| D | constants-riscv64.h | 312 const uint32_t kBaseOpcodeMask = ((1 << kBaseOpcodeBits) - 1) variable 318 const uint32_t kRTypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct7Mask; 319 const uint32_t kRATypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct5Mask; 320 const uint32_t kRFPTypeMask = kBaseOpcodeMask | kFunct7Mask; 321 const uint32_t kR4TypeMask = kBaseOpcodeMask | kFunct3Mask | kFunct2Mask; 322 const uint32_t kITypeMask = kBaseOpcodeMask | kFunct3Mask; 323 const uint32_t kSTypeMask = kBaseOpcodeMask | kFunct3Mask; 324 const uint32_t kBTypeMask = kBaseOpcodeMask | kFunct3Mask; 325 const uint32_t kUTypeMask = kBaseOpcodeMask; 326 const uint32_t kJTypeMask = kBaseOpcodeMask; [all …]
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| D | constants-riscv64.cc | 195 switch (InstructionBits() & kBaseOpcodeMask) { in InstructionType()
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| D | assembler-riscv64.cc | 312 return (instr & kBaseOpcodeMask) == BRANCH; in IsBranch() 320 int Op = instr & kBaseOpcodeMask; in IsJump() 326 bool Assembler::IsJal(Instr instr) { return (instr & kBaseOpcodeMask) == JAL; } in IsJal() 329 return (instr & kBaseOpcodeMask) == JALR; in IsJalr() 336 bool Assembler::IsLui(Instr instr) { return (instr & kBaseOpcodeMask) == LUI; } in IsLui() 338 return (instr & kBaseOpcodeMask) == AUIPC; in IsAuipc() 341 return (instr & (kBaseOpcodeMask | kFunct3Mask)) == RO_ADDIW; in IsAddiw() 344 return (instr & (kBaseOpcodeMask | kFunct3Mask)) == RO_ADDI; in IsAddi() 347 return (instr & (kBaseOpcodeMask | kFunct3Mask)) == RO_ORI; in IsOri() 350 return (instr & (kBaseOpcodeMask | kFunct3Mask)) == RO_SLLI; in IsSlli() [all …]
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| /third_party/node/deps/v8/src/diagnostics/riscv64/ |
| D | disasm-riscv64.cc | 1909 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVV); in DecodeRvvIVV() 2017 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVI); in DecodeRvvIVI() 2110 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVX); in DecodeRvvIVX() 2227 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_MVV); in DecodeRvvMVV() 2311 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_MVX); in DecodeRvvMVX() 2354 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_FVV); in DecodeRvvFVV() 2538 DCHECK_EQ(instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_FVF); in DecodeRvvFVF() 2610 switch (instr->InstructionBits() & (kBaseOpcodeMask | kFunct3Mask)) { in DecodeVType() 2634 (kBaseOpcodeMask | kFunct3Mask | 0x80000000)) { in DecodeVType() 2680 instr->InstructionBits() & (kRvvMopMask | kRvvNfMask | kBaseOpcodeMask); in DecodeRvvVL() [all …]
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| /third_party/node/deps/v8/src/execution/riscv64/ |
| D | simulator-riscv64.cc | 4272 instr_.InstructionBits() & (kRvvMopMask | kRvvNfMask | kBaseOpcodeMask); in DecodeRvvVL() 4337 instr_.InstructionBits() & (kRvvMopMask | kRvvNfMask | kBaseOpcodeMask); in DecodeRvvVS() 5062 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVV); in DecodeRvvIVV() 5365 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVI); in DecodeRvvIVI() 5549 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_IVX); in DecodeRvvIVX() 5754 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_MVV); in DecodeRvvMVV() 5975 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_MVX); in DecodeRvvMVX() 6042 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_FVV); in DecodeRvvFVV() 6653 DCHECK_EQ(instr_.InstructionBits() & (kBaseOpcodeMask | kFunct3Mask), OP_FVF); in DecodeRvvFVF() 6781 switch (instr_.InstructionBits() & (kFunct3Mask | kBaseOpcodeMask)) { in DecodeVType() [all …]
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