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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_irq.c30 * DOC: Interrupt Handling
32 * Interrupts generated within GPU hardware raise interrupt requests that are
34 * type of the interrupt and dispatching matching handlers. If handling an
35 * interrupt requires calling kernel functions that may sleep processing is
41 * For GPU interrupt sources that may be driven by another driver, IRQ domain
69 * amdgpu_hotplug_work_func - work handler for display hotplug event
75 * was a hotplug interrupt. It walks through the connector table
89 struct drm_mode_config *mode_config = &dev->mode_config; in amdgpu_hotplug_work_func()
93 mutex_lock(&mode_config->mutex); in amdgpu_hotplug_work_func()
98 mutex_unlock(&mode_config->mutex); in amdgpu_hotplug_work_func()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_irq.c30 * DOC: Interrupt Handling
32 * Interrupts generated within GPU hardware raise interrupt requests that are
34 * type of the interrupt and dispatching matching handlers. If handling an
35 * interrupt requires calling kernel functions that may sleep processing is
41 * For GPU interrupt sources that may be driven by another driver, IRQ domain
118 * amdgpu_irq_disable_all - disable *all* interrupts
130 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
132 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
136 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all() local
138 if (!src || !src->funcs->set || !src->num_types) in amdgpu_irq_disable_all()
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/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dste-nomadik-stn8815.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
18 L2: cache-controller {
19 compatible = "arm,l210-cache";
21 interrupt-parent = <&vica>;
23 cache-unified;
24 cache-level = <2>;
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dste-nomadik-stn8815.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
18 L2: cache-controller {
19 compatible = "arm,l210-cache";
21 interrupt-parent = <&vica>;
23 cache-unified;
24 cache-level = <2>;
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Dr8a7778.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M1A (R8A77781) SoC
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
20 interrupt-parent = <&gic>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c46 * What DM provides on top are two IRQ tables specifically for top-half and
47 * bottom-half IRQ handling, with the bottom-half implementing workqueues:
49 * - &amdgpu_display_manager.irq_handler_list_high_tab
50 * - &amdgpu_display_manager.irq_handler_list_low_tab
59 * To expose DC's hardware interrupt toggle to the base driver, DM implements
61 * amdgpu_irq_update() to enable or disable the interrupt.
69 * struct amdgpu_dm_irq_handler_data - Data for DM interrupt handlers.
75 * @irq_source: DC interrupt source that this handler is registered for
83 /* DAL irq source which registered for this interrupt. */
89 spin_lock_irqsave(&adev->dm.irq_handler_list_table_lock, flags)
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c46 * What DM provides on top are two IRQ tables specifically for top-half and
47 * bottom-half IRQ handling, with the bottom-half implementing workqueues:
49 * - &amdgpu_display_manager.irq_handler_list_high_tab
50 * - &amdgpu_display_manager.irq_handler_list_low_tab
59 * To expose DC's hardware interrupt toggle to the base driver, DM implements
61 * amdgpu_irq_update() to enable or disable the interrupt.
69 * struct amdgpu_dm_irq_handler_data - Data for DM interrupt handlers.
75 * @irq_source: DC interrupt source that this handler is registered for
84 /* DAL irq source which registered for this interrupt. */
90 spin_lock_irqsave(&adev->dm.irq_handler_list_table_lock, flags)
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/kernel/linux/linux-6.6/arch/powerpc/platforms/4xx/
Duic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * IBM PowerPC 4xx Universal Interrupt Controller
20 #include <linux/interrupt.h>
55 unsigned int src = irqd_to_hwirq(d); in uic_unmask_irq() local
59 sr = 1 << (31-src); in uic_unmask_irq()
60 raw_spin_lock_irqsave(&uic->lock, flags); in uic_unmask_irq()
61 /* ack level-triggered interrupts here */ in uic_unmask_irq()
63 mtdcr(uic->dcrbase + UIC_SR, sr); in uic_unmask_irq()
64 er = mfdcr(uic->dcrbase + UIC_ER); in uic_unmask_irq()
66 mtdcr(uic->dcrbase + UIC_ER, er); in uic_unmask_irq()
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/kernel/linux/linux-5.10/arch/powerpc/platforms/4xx/
Duic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * IBM PowerPC 4xx Universal Interrupt Controller
20 #include <linux/interrupt.h>
53 unsigned int src = irqd_to_hwirq(d); in uic_unmask_irq() local
57 sr = 1 << (31-src); in uic_unmask_irq()
58 raw_spin_lock_irqsave(&uic->lock, flags); in uic_unmask_irq()
59 /* ack level-triggered interrupts here */ in uic_unmask_irq()
61 mtdcr(uic->dcrbase + UIC_SR, sr); in uic_unmask_irq()
62 er = mfdcr(uic->dcrbase + UIC_ER); in uic_unmask_irq()
64 mtdcr(uic->dcrbase + UIC_ER, er); in uic_unmask_irq()
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/kernel/linux/linux-6.6/arch/powerpc/sysdev/
Dehv_pic.c4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
19 #include <linux/interrupt.h>
47 unsigned int src = virq_to_hw(d->irq); in ehv_pic_unmask_irq() local
49 ev_int_set_mask(src, 0); in ehv_pic_unmask_irq()
54 unsigned int src = virq_to_hw(d->irq); in ehv_pic_mask_irq() local
56 ev_int_set_mask(src, 1); in ehv_pic_mask_irq()
61 unsigned int src = virq_to_hw(d->irq); in ehv_pic_end_irq() local
63 ev_int_eoi(src); in ehv_pic_end_irq()
74 unsigned int src = virq_to_hw(d->irq); in ehv_pic_set_affinity() local
80 ev_int_get_config(src, &config, &prio, &cpu_dest); in ehv_pic_set_affinity()
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Dcpm2_pic.c9 * 1999-2001 (c) Dan Malek <dan@embeddedalley.com>
17 /* The CPM2 internal interrupt controller. It is usually
18 * the only interrupt controller.
19 * There are two 32-bit registers (high/low) for up to 64
22 * Now, the fun starts.....Interrupt Numbers DO NOT MAP
24 * That is, interrupt 4 does not map to bit position 4.
51 static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
86 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_mask_irq()
98 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_unmask_irq()
109 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
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/kernel/linux/linux-5.10/arch/powerpc/sysdev/
Dehv_pic.c4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
18 #include <linux/interrupt.h>
46 unsigned int src = virq_to_hw(d->irq); in ehv_pic_unmask_irq() local
48 ev_int_set_mask(src, 0); in ehv_pic_unmask_irq()
53 unsigned int src = virq_to_hw(d->irq); in ehv_pic_mask_irq() local
55 ev_int_set_mask(src, 1); in ehv_pic_mask_irq()
60 unsigned int src = virq_to_hw(d->irq); in ehv_pic_end_irq() local
62 ev_int_eoi(src); in ehv_pic_end_irq()
73 unsigned int src = virq_to_hw(d->irq); in ehv_pic_set_affinity() local
79 ev_int_get_config(src, &config, &prio, &cpu_dest); in ehv_pic_set_affinity()
[all …]
Dcpm2_pic.c9 * 1999-2001 (c) Dan Malek <dan@embeddedalley.com>
17 /* The CPM2 internal interrupt controller. It is usually
18 * the only interrupt controller.
19 * There are two 32-bit registers (high/low) for up to 64
22 * Now, the fun starts.....Interrupt Numbers DO NOT MAP
24 * That is, interrupt 4 does not map to bit position 4.
53 static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
88 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_mask_irq()
100 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_unmask_irq()
111 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
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/kernel/linux/linux-6.6/arch/powerpc/platforms/powermac/
Dpic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for the interrupt controllers found on Power Macintosh,
4 * currently Apple's "Grand Central" interrupt controller in all
18 #include <linux/interrupt.h>
30 #include <asm/pci-bridge.h>
61 static int pmac_irq_cascade = -1;
79 unsigned int src = irqd_to_hwirq(d); in pmac_mask_and_ack_irq() local
80 unsigned long bit = 1UL << (src & 0x1f); in pmac_mask_and_ack_irq()
81 int i = src >> 5; in pmac_mask_and_ack_irq()
85 __clear_bit(src, ppc_cached_irq_mask); in pmac_mask_and_ack_irq()
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/kernel/linux/linux-5.10/arch/powerpc/platforms/powermac/
Dpic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for the interrupt controllers found on Power Macintosh,
4 * currently Apple's "Grand Central" interrupt controller in all
18 #include <linux/interrupt.h>
27 #include <asm/pci-bridge.h>
58 static int pmac_irq_cascade = -1;
76 unsigned int src = irqd_to_hwirq(d); in pmac_mask_and_ack_irq() local
77 unsigned long bit = 1UL << (src & 0x1f); in pmac_mask_and_ack_irq()
78 int i = src >> 5; in pmac_mask_and_ack_irq()
82 __clear_bit(src, ppc_cached_irq_mask); in pmac_mask_and_ack_irq()
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Deverest,es8326.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Yang <yangxiaohua@everest-semi.com>
21 - description: clock for master clock (MCLK)
23 clock-names:
25 - const: mclk
27 "#sound-dai-cells":
30 everest,jack-pol:
40 everest,mic1-src:
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/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dr8a7778.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M1A (R8A77781) SoC
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
20 interrupt-parent = <&gic>;
21 #address-cells = <1>;
22 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
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/kernel/linux/linux-5.10/arch/c6x/platforms/
Dmegamod-pic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Support for C64x+ Megamodule Interrupt Controller
9 #include <linux/interrupt.h>
16 #include <asm/megamod-pic.h>
24 * Megamodule Interrupt Controller register layout
68 irq_hw_number_t src = irqd_to_hwirq(data); in mask_megamod() local
69 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in mask_megamod()
71 raw_spin_lock(&pic->lock); in mask_megamod()
72 soc_writel(soc_readl(evtmask) | (1 << (src & 31)), evtmask); in mask_megamod()
73 raw_spin_unlock(&pic->lock); in mask_megamod()
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/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Damplc_dio200_common.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
14 #include <linux/interrupt.h>
27 #define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
38 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
93 const struct dio200_board *board = dev->board_ptr; in dio200_read8()
95 if (board->is_pcie) in dio200_read8()
98 if (dev->mmio) in dio200_read8()
99 return readb(dev->mmio + offset); in dio200_read8()
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/kernel/linux/linux-6.6/drivers/comedi/drivers/
Damplc_dio200_common.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
14 #include <linux/interrupt.h>
26 #define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
37 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
92 const struct dio200_board *board = dev->board_ptr; in dio200_read8()
94 if (board->is_pcie) in dio200_read8()
97 if (dev->mmio) in dio200_read8()
98 return readb(dev->mmio + offset); in dio200_read8()
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/kernel/linux/linux-5.10/arch/powerpc/kvm/
Dmpic.c63 #define OPENPIC_CPU_REG_SIZE (0x100 + ((MAX_CPU - 1) * 0x1000))
116 struct kvm_vcpu *vcpu = current->thread.kvm_vcpu; in get_current_cpu()
117 return vcpu ? vcpu->arch.irq_cpu_id : -1; in get_current_cpu()
120 return -1; in get_current_cpu()
133 IRQ_TYPE_FSLINT, /* FSL internal interrupt -- level only */
134 IRQ_TYPE_FSLSPECIAL, /* FSL timer/IPI interrupt, edge, no polarity */
154 bool level:1; /* level-triggered */
171 #define IVPR_VECTOR(opp, _ivprr_) ((_ivprr_) & (opp)->vector_mask)
175 #define IDR_CI 0x40000000 /* critical interrupt */
184 /* Count of IRQ sources asserting on non-INT outputs */
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/kernel/linux/linux-6.6/arch/powerpc/kvm/
Dmpic.c63 #define OPENPIC_CPU_REG_SIZE (0x100 + ((MAX_CPU - 1) * 0x1000))
116 struct kvm_vcpu *vcpu = current->thread.kvm_vcpu; in get_current_cpu()
117 return vcpu ? vcpu->arch.irq_cpu_id : -1; in get_current_cpu()
120 return -1; in get_current_cpu()
133 IRQ_TYPE_FSLINT, /* FSL internal interrupt -- level only */
134 IRQ_TYPE_FSLSPECIAL, /* FSL timer/IPI interrupt, edge, no polarity */
154 bool level:1; /* level-triggered */
171 #define IVPR_VECTOR(opp, _ivprr_) ((_ivprr_) & (opp)->vector_mask)
175 #define IDR_CI 0x40000000 /* critical interrupt */
184 /* Count of IRQ sources asserting on non-INT outputs */
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Dbook3s_xics.c1 // SPDX-License-Identifier: GPL-2.0-only
40 * sources and avoiding simultaneous deliveries of the same interrupt.
50 * - To speed up resends, keep a bitmap of "resend" set bits in the
53 * - Speed up server# -> ICP lookup (array ? hash table ?)
55 * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
59 /* -- ICS routines -- */
65 * Return value ideally indicates how the interrupt was handled, but no
73 u16 src; in ics_deliver_irq() local
78 ics = kvmppc_xics_find_ics(xics, irq, &src); in ics_deliver_irq()
81 return -EINVAL; in ics_deliver_irq()
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/kernel/linux/linux-5.10/drivers/dma/
Dste_dma40_ll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2007-2010
4 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
5 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
9 #include <linux/platform_data/dma-ste-dma40.h>
30 u32 l1 = 0; /* src */ in d40_log_cfg()
32 /* src is mem? -> increase address pos */ in d40_log_cfg()
33 if (cfg->dir == DMA_MEM_TO_DEV || in d40_log_cfg()
34 cfg->dir == DMA_MEM_TO_MEM) in d40_log_cfg()
37 /* dst is mem? -> increase address pos */ in d40_log_cfg()
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/kernel/linux/linux-6.6/drivers/dma/
Dste_dma40_ll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2007-2010
4 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
5 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
31 u32 l1 = 0; /* src */ in d40_log_cfg()
33 /* src is mem? -> increase address pos */ in d40_log_cfg()
34 if (cfg->dir == DMA_MEM_TO_DEV || in d40_log_cfg()
35 cfg->dir == DMA_MEM_TO_MEM) in d40_log_cfg()
38 /* dst is mem? -> increase address pos */ in d40_log_cfg()
39 if (cfg->dir == DMA_DEV_TO_MEM || in d40_log_cfg()
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