Lines Matching +full:read +full:- +full:only
14 Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer.
15 The value is read directly from HW register RSZ, 0x004.
21 Description: (Read) Shows the value held by the TMC status register. The value
22 is read directly from HW register STS, 0x00C.
28 Description: (Read) Shows the value held by the TMC RAM Read Pointer register
29 that is used to read entries from the Trace RAM over the APB
30 interface. The value is read directly from HW register RRP,
37 Description: (Read) Shows the value held by the TMC RAM Write Pointer register
39 the CoreSight bus into the Trace RAM. The value is read directly
46 Description: (Read) Similar to "trigger_cntr" above except that this value is
47 read directly from HW register TRG, 0x01C.
53 Description: (Read) Shows the value held by the TMC Control register. The value
54 is read directly from HW register CTL, 0x020.
60 Description: (Read) Shows the value held by the TMC Formatter and Flush Status
61 register. The value is read directly from HW register FFSR,
68 Description: (Read) Shows the value held by the TMC Formatter and Flush Control
69 register. The value is read directly from HW register FFCR,
76 Description: (Read) Shows the value held by the TMC Mode register, which
78 The value is read directly from the MODE register, 0x028.
84 Description: (Read) Indicates the capabilities of the Coresight TMC.
85 The value is read directly from the DEVID register, 0xFC8,
91 Description: (RW) Size of the trace buffer for TMC-ETR when used in SYSFS
92 mode. Writable only for TMC-ETR configurations. The value
99 Description: (Read) Shows all supported Coresight TMC-ETR buffer modes available
100 for the users to configure explicitly. This file is available only
107 Description: (RW) Current Coresight TMC-ETR buffer mode selected. But user could
108 only provide a mode which is supported for a given ETR device. This
109 file is available only for TMC ETR devices.