Lines Matching +full:valid +full:- +full:mask
1 .. SPDX-License-Identifier: GPL-2.0
7 :Author: - Sean V Kelley <sean.v.kelley@linux.intel.com>
13 interrupt messages (Assert_INTx/Deassert_INTx). The integrated IO-APIC in a
15 MSI interrupts. If the IO-APIC is disabled (via the mask bits in the
16 IO-APIC table entries), the messages are routed to the legacy PCH. This
17 in-band interrupt mechanism was traditionally necessary for systems that
18 did not support the IO-APIC and for boot. Intel in the past has used the
20 protocol describes this in-band legacy wire-interrupt INTx mechanism for
21 I/O devices to signal PCI-style level interrupts. The subsequent paragraphs
29 When in-band legacy INTx messages are forwarded to the PCH, they in turn
34 now prevents valid usage by an existing interrupt which may happen to share
38 CPU: 0 PID: 2988 Comm: irq/34-nipalk Tainted: 4.14.87-rt49-02410-g4a640ec-dirty #1
39 Hardware name: National Instruments NI PXIe-8880/NI PXIe-8880, BIOS 2.1.5f1 01/09/2020
64 this problem today. Threaded interrupts may not be re-enabled after the IRQ
79 Starting with ICX there are no longer any IO-APICs in the Core IO's
80 devices. IO-APIC is only in the PCH. Devices connected to the Core IO's
81 PCIe Root Ports will use native MSI/MSI-X mechanisms.
105 PCH - they are either converted into MSI via the integrated IO-APIC
106 (if the IO-APIC mask bit is clear in the appropriate entries)
107 or cause no further action (when mask bit is set)
113 disabled, the Linux kernel will reroute the valid interrupt to its legacy
132 ------------------------------------------
134 - Intel® 6300ESB I/O Controller Hub (Document # 300641-004US)
136 https://www.intel.com/content/dam/doc/datasheet/6300esb-io-controller-hub-datasheet.pdf
138 - Intel® Xeon® Processor E5-1600/2400/2600/4600 v3 Product Families
139 Datasheet - Volume 2: Registers (Document # 330784-003)
141 …https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v3-datasheet-vol-2…
144 ----------------------------
146 - Intel® 6700PXH 64-bit PCI Hub (Document # 302628)
148 https://www.intel.com/content/dam/doc/datasheet/6700pxh-64-bit-pci-hub-datasheet.pdf
157 .. [1] https://lore.kernel.org/r/12131949181903-git-send-email-sassmann@suse.de/
158 .. [2] https://lore.kernel.org/r/12131949182094-git-send-email-sassmann@suse.de/