Lines Matching +full:target +full:- +full:module

2 .. SPDX-License-Identifier: GPL-2.0
4 Cross-Thread Return Address Predictions
7 Certain AMD and Hygon processors are subject to a cross-thread return address
9 transitions out of C0 state, the other sibling thread could use return target
15 transitioning out of C0. This could result in a guest-controlled return target
19 -------------------
23     - AMD Family 17h processors
24     - Hygon Family 18h processors
27 ------------
32    CVE-2022-27672  Cross-Thread Return Address Predictions
36 -------
38 Affected SMT-capable processors support 1T and 2T modes of execution when SMT
42 HLT instruction or with an MWAIT instruction that requests non-C0.
43 When the thread re-enters the C0 state, the processor transitions back
48 16-entry RAP, but in 1T mode, the active thread uses a 32-entry RAP. Upon
50 pointers (which control the next return target to use for predictions) may
54 use a return target from the thread that just became idle. In theory, this
59 ----------------
66 --------------------
78 ---------------------------------------------
82 Mitigation control for KVM - module parameter
83 ---------------------------------------------
91 using the boolean module parameter mitigate_smt_rsb, e.g. ``kvm.mitigate_smt_rsb=1``.