Lines Matching full:cache
10 as CPU cache coherence, but may have different performance. For example,
99 NUMA Cache
107 higher performing memory to transparently cache access to progressively
111 hierarchy. Each increasing cache level provides higher performing
113 cache provided by the system.
115 This numbering is different than CPU caches where the cache level (ex:
117 performing. In contrast, the memory cache level is centric to the last
118 level memory, so the higher numbered cache level corresponds to memory
123 near memory cache if it is present. If it is not present, the system
125 cache level, or it reaches far memory.
128 to use the system. Software may optionally query the memory cache
134 When the kernel first registers a memory cache with a node, the kernel
140 a memory-side cache, or that information is not accessible to the kernel.
142 The attributes for each level of cache is provided under its cache
149 Each cache level's directory provides its attributes. For example, the
150 following shows a single cache level and the attributes available for
161 The "indexing" will be 0 if it is a direct-mapped cache, and non-zero
164 The "line_size" is the number of bytes accessed from the next cache
167 The "size" is the number of bytes provided by this cache level.