Lines Matching +full:soc +full:- +full:vdec

1 .. SPDX-License-Identifier: GPL-2.0
4 Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU)
7 The Amlogic Meson G12 SoC contains a bandwidth monitor inside DRAM controller.
20 meson_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events are channel-specific events.
22 individual IP module in SoC.
26 + arm             - from CPU
27 + vpu_read1       - from OSD + VPP read
28 + gpu             - from 3D GPU
29 + pcie            - from PCIe controller
30 + hdcp            - from HDCP controller
31 + hevc_front      - from HEVC codec front end
32 + usb3_0          - from USB3.0 controller
33 + hevc_back       - from HEVC codec back end
34 + h265enc         - from HEVC encoder
35 + vpu_read2       - from DI read
36 + vpu_write1      - from VDIN write
37 + vpu_write2      - from di write
38 + vdec            - from legacy codec video decoder
39 + hcodec          - from H264 encoder
40 + ge2d            - from ge2d
41 + spicc1          - from SPI controller 1
42 + usb0            - from USB2.0 controller 0
43 + dma             - from system DMA controller 1
44 + arb0            - from arb0
45 + sd_emmc_b       - from SD eMMC b controller
46 + usb1            - from USB2.0 controller 1
47 + audio           - from Audio module
48 + sd_emmc_c       - from SD eMMC c controller
49 + spicc2          - from SPI controller 2
50 + ethernet        - from Ethernet controller
57     .. code-block:: bash
59        perf stat -a -e meson_ddr_bw/total_rw_bytes/ -I 1000 sleep 10
65     .. code-block:: bash
67        perf stat -a -e meson_ddr_bw/chan_1_rw_bytes,arm=1/ -I 1000 sleep 10
68        perf stat -a -e meson_ddr_bw/chan_2_rw_bytes,gpu=1/ -I 1000 sleep 10
69        perf stat -a -e meson_ddr_bw/chan_3_rw_bytes,arm=1,gpu=1/ -I 1000 sleep 10