Lines Matching +full:compare +full:- +full:and +full:- +full:swap
11 an object's reference counters. While a generic architecture-independent
13 there are a number of differences between some of the ``refcount_*()`` and
15 This document outlines the differences and provides respective examples
20 tools/memory-model/Documentation/explanation.txt.
22 memory-barriers.txt and atomic_t.txt provide more background to the
23 memory ordering in general and for atomic operations specifically.
29 ordering types that are relevant for the atomics and reference
30 counters and used through this document. For a much broader picture
31 please consult memory-barriers.txt document.
34 atomics & refcounters only provide atomicity and
36 each ``atomic_*()`` and ``refcount_*()`` operation is atomic and instructions
38 This is implemented using READ_ONCE()/WRITE_ONCE() and
39 compare-and-swap primitives.
41 A strong (full) memory ordering guarantees that all prior loads and
42 stores (all po-earlier instructions) on the same CPU are completed
43 before any po-later instruction is executed on the same CPU.
44 It also guarantees that all po-earlier stores on the same CPU
45 and all propagated stores from other CPUs must propagate to all
46 other CPUs before any po-later instruction is executed on the original
47 CPU (A-cumulative property). This is implemented using smp_mb().
49 A RELEASE memory ordering guarantees that all prior loads and
50 stores (all po-earlier instructions) on the same CPU are completed
51 before the operation. It also guarantees that all po-earlier
52 stores on the same CPU and all propagated stores from other CPUs
54 (A-cumulative property). This is implemented using
57 An ACQUIRE memory ordering guarantees that all post loads and
58 stores (all po-later instructions) on the same CPU are
60 po-later stores on the same CPU must propagate to all other CPUs
70 a single CPU relation and provides no guarantees for other CPUs.
76 case 1) - non-"Read/Modify/Write" (RMW) ops
77 -------------------------------------------
81 * atomic_set() --> refcount_set()
82 * atomic_read() --> refcount_read()
89 case 2) - non-"Read/Modify/Write" (RMW) ops with release ordering
90 -----------------------------------------------------------------
94 * atomic_set_release() --> refcount_set_release()
101 case 3) - increment-based ops that return no value
102 --------------------------------------------------
106 * atomic_inc() --> refcount_inc()
107 * atomic_add() --> refcount_add()
113 case 4) - decrement-based RMW ops that return no value
114 ------------------------------------------------------
118 * atomic_dec() --> refcount_dec()
122 * fully unordered --> RELEASE ordering
125 case 5) - increment-based RMW ops that return a value
126 -----------------------------------------------------
130 * atomic_inc_not_zero() --> refcount_inc_not_zero()
131 * no atomic counterpart --> refcount_add_not_zero()
135 * fully ordered --> control dependency on success for stores
141 case 6) - increment-based RMW ops with acquire ordering that return a value
142 ---------------------------------------------------------------------------
146 * atomic_inc_not_zero() --> refcount_inc_not_zero_acquire()
147 * no atomic counterpart --> refcount_add_not_zero_acquire()
151 * fully ordered --> ACQUIRE ordering on success
154 case 7) - generic dec/sub decrement-based RMW ops that return a value
155 ---------------------------------------------------------------------
159 * atomic_dec_and_test() --> refcount_dec_and_test()
160 * atomic_sub_and_test() --> refcount_sub_and_test()
164 * fully ordered --> RELEASE ordering + ACQUIRE ordering on success
167 case 8) other decrement-based RMW ops that return a value
168 ---------------------------------------------------------
172 * no atomic counterpart --> refcount_dec_if_one()
173 * ``atomic_add_unless(&var, -1, 1)`` --> ``refcount_dec_not_one(&var)``
177 * fully ordered --> RELEASE ordering + control dependency
182 case 9) - lock-based RMW
183 ------------------------
187 * atomic_dec_and_lock() --> refcount_dec_and_lock()
188 * atomic_dec_and_mutex_lock() --> refcount_dec_and_mutex_lock()
192 * fully ordered --> RELEASE ordering + control dependency + hold