Lines Matching +full:guest +full:- +full:index +full:- +full:bits

1 .. SPDX-License-Identifier: GPL-2.0
19 These APIs use the device DMA attributes and kernel-wide settings to determine
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33 only provide 32-bit DMA addresses. By allocating bounce buffer memory below
37 More recently, Confidential Computing (CoCo) VMs have the guest VM's memory
39 and VMM. For the host to do I/O on behalf of the guest, the I/O must be
40 directed to guest memory that is unencrypted. CoCo VMs set a kernel-wide option
54 IOMMU access control is per-granule, the untrusted device can gain access to
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89 pre-allocated at boot time (but see Dynamic swiotlb below). Because swiotlb
93 The need to pre-allocate the default swiotlb pool creates a boot-time tradeoff.
95 always be satisfied, as the non-blocking requirement means requests can't wait
97 this pre-allocated memory is not available for other uses in the system. The
109 must be limited to that 256 KiB. This value is communicated to higher-level
111 higher-level code fails to account for this limit, it may make requests that
115 so that some number of low order bits are set, or it may be zero. swiotlb
116 allocations ensure these min_align_mask bits of the physical address of the
117 bounce buffer match the same bits in the address of the original buffer. When
118 min_align_mask is non-zero, it may produce an "alignment offset" in the address
124 swiotlb, max_sectors_kb will be 256 KiB. When min_align_mask is non-zero,
129 physical address with the alloc_align_mask bits set to zero. But the actual
130 bounce buffer might start at a larger address if min_align_mask is non-zero.
131 Hence there may be pre-padding space that is allocated prior to the start of
133 alloc_align_mask boundary, potentially resulting in post-padding space. Any
134 pre-padding or post-padding space is not initialized by swiotlb code. The
136 devices. It is set to the granule size - 1 so that the bounce buffer is
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149 it works for devices that can only address 32-bits of physical memory (unless
150 architecture-specific code provides the SWIOTLB_ANY flag). In a CoCo VM, the
159 IO_TLB_SEGSIZE. Multiple smaller bounce buffers may co-exist in a single slot
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195 When CONFIG_SWIOTLB_DYNAMIC is enabled, swiotlb can do on-demand expansion of
208 background task can add another non-transient pool.
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251 entry for each area, and is accessed using a 0-based area index derived from the
257 index computed from the bounce buffer address relative to the starting memory
299 requirements, it may allocate pre-padding space across zero or more slots. But
304 The "pad_slots" value is recorded only in the first non-padding slot allocated
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