Lines Matching +full:cpu +full:- +full:interrupt +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL SoC interrupt controller
10 Interrupt controller and router for Realtek MIPS SoCs, allowing each SoC
11 interrupt to be routed to one parent CPU (hardware) interrupt, or left
14 and an interrupt status register is present to indicate which interrupts are
18 - Birger Koblitz <mail@birger-koblitz.de>
19 - Bert Vermeulen <bert@biot.com>
20 - John Crispin <john@phrozen.org>
25 - items:
26 - enum:
27 - realtek,rtl8380-intc
28 - realtek,rtl9300-intc
29 - const: realtek,rtl-intc
30 - const: realtek,rtl-intc
33 "#interrupt-cells":
35 SoC interrupt line index.
41 - description: vpe0 registers
42 - description: vpe1 registers
49 interrupt router's outputs, starting at the first output.
51 interrupt-controller: true
53 interrupt-map:
55 description: Describes mapping from SoC interrupts to CPU interrupts
58 - compatible
59 - reg
60 - "#interrupt-cells"
61 - interrupt-controller
64 - if:
67 const: realtek,rtl-intc
70 "#address-cells":
73 - "#address-cells"
74 - interrupt-map
77 - interrupts
78 - if:
82 const: realtek,rtl9300-intc
96 - |
97 interrupt-controller@3000 {
98 compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
99 #interrupt-cells = <1>;
100 interrupt-controller;
103 interrupt-parent = <&cpuintc>;