Lines Matching +full:tx +full:- +full:output +full:- +full:mode

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Andy Gross <agross@kernel.org>
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
12   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15   The QUP core is an AHB slave that provides a common data path (an output FIFO
16   and an input FIFO) for serial peripheral interface (SPI) mini-core.
18   SPI in master mode supports up to 50MHz, up to four chip selects,
22   - $ref: /schemas/spi/spi-controller.yaml#
27       - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064
28       - qcom,spi-qup-v2.1.1 # for 8974 and later
29       - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
34   clock-names:
36       - const: core
37       - const: iface
42   dma-names:
44       - const: tx
45       - const: rx
53   operating-points-v2: true
55   power-domains:
62   - compatible
63   - clocks
64   - clock-names
65   - interrupts
66   - reg
71   - |
72     #include <dt-bindings/clock/qcom,gcc-msm8996.h>
73     #include <dt-bindings/interconnect/qcom,msm8996.h>
74     #include <dt-bindings/interrupt-controller/arm-gic.h>
75     #include <dt-bindings/power/qcom-rpmpd.h>
78         compatible = "qcom,spi-qup-v2.2.1";
83         clock-names = "core", "iface";
84         pinctrl-names = "default", "sleep";
85         pinctrl-0 = <&blsp1_spi1_default>;
86         pinctrl-1 = <&blsp1_spi1_sleep>;
88         dma-names = "tx", "rx";
89         power-domains = <&rpmpd MSM8996_VDDCX>;
90         operating-points-v2 = <&spi_opp_table>;
92         #address-cells = <1>;
93         #size-cells = <0>;