Lines Matching +full:chip +full:- +full:to +full:- +full:chip
10 The generic NAND driver supports almost all NAND and AG-AND based chips
11 and connects them to the Memory Technology Devices (MTD) subsystem of
14 This documentation is provided for developers who want to implement
31 --------------------------
37 - [MTD Interface]
39 These functions provide the interface to the MTD kernel API. They are
43 - [NAND Interface]
45 These functions are exported and provide the interface to the NAND
48 - [GENERIC]
53 - [DEFAULT]
58 via pointers in the NAND chip description structure. The board driver
61 NULL on entry to nand_scan() then the pointer is set to the default
62 function which is suitable for the detected chip type.
65 -------------------------------
71 - [INTERN]
74 modified. Most of these values are calculated from the chip geometry
77 - [REPLACEABLE]
82 nand_scan(). If the function pointer is NULL on entry to
83 nand_scan() then the pointer is set to the default function which is
84 suitable for the detected chip type.
86 - [BOARDSPECIFIC]
92 - [OPTIONAL]
100 For most boards it will be sufficient to provide just the basic
102 chip description structure.
105 -------------
107 At least you have to provide a nand_chip structure and a storage for
108 the ioremap'ed chip address. You can allocate the nand_chip structure
109 using kmalloc or you can allocate it statically. The NAND chip structure
110 embeds an mtd structure which will be registered to the MTD subsystem.
111 You can extract a pointer to the mtd structure from a nand_chip pointer
131 -----------------
133 If you want to divide your device into partitions, then define a
134 partitioning scheme suitable to your board.
150 -------------------------
152 The hardware control function provides access to the control pins of the
153 NAND chip(s). The access can be done by GPIO pins or by address lines.
175 by a chip select decoder.
183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
192 ---------------------
194 If the hardware interface has the ready busy pin of the NAND chip
195 connected to a GPIO or other accessible I/O pin, this function is used
196 to read back the state of the pin. The function has no arguments and
199 give access to the ready busy pin, then the function must not be defined
200 and the function pointer this->legacy.dev_ready is set to NULL.
203 -------------
207 is called. This function tries to detect and identify then chip. If a
208 chip is found all the internal data fields are initialized accordingly.
209 The structure(s) have to be zeroed out first and then filled with the
222 printk ("Unable to allocate NAND MTD device structure.\n");
223 err = -ENOMEM;
232 printk("Ioremap to access NAND chip failed\n");
233 err = -EIO;
238 this->legacy.IO_ADDR_R = baseaddr;
239 this->legacy.IO_ADDR_W = baseaddr;
241 this->hwcontrol = board_hwcontrol;
243 this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
245 this->legacy.dev_ready = board_dev_ready;
246 this->eccmode = NAND_ECC_SOFT;
248 /* Scan to find existence of the device */
250 err = -ENXIO;
268 -------------
271 module. It releases all resources which are held by the chip driver and
301 Multiple chip control
302 ---------------------
304 The nand driver can control chip arrays. Therefore the board driver must
306 requested chip. The function pointer in the nand_chip structure must be
308 defines the maximum number of chips to scan for. Make sure that the
311 The nand driver concatenates the chips to one virtual chip and provides
312 this virtual chip to the MTD layer.
314 *Note: The driver can only handle linear chip arrays of equally sized
322 static void board_select_chip (struct mtd_info *mtd, int chip)
326 if (chip >= 0)
327 GPIO(BOARD_NAND_NCE) &= ~ (1 << chip);
332 connected to an address decoder.
336 static void board_select_chip (struct mtd_info *mtd, int chip)
341 this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
343 switch (chip) {
345 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
350 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
358 --------------------
365 - NAND_ECC_HW3_256
369 - NAND_ECC_HW3_512
373 - NAND_ECC_HW6_512
377 - NAND_ECC_HW8_512
386 - enable_hwecc
388 This function is called before reading / writing to the chip. Reset
393 - calculate_ecc
395 This function is called after read / write from / to the chip.
396 Transfer the ECC from the hardware to the buffer. If the option
400 - correct_data
404 corrected. If the error is not correctable return -1. If your
412 Many hardware ECC implementations provide Reed-Solomon codes and
413 calculate an error syndrome on read. The syndrome must be converted to a
414 standard Reed-Solomon syndrome before calling the error correction code
415 in the generic Reed-Solomon library.
418 to make the syndrome generator work. This is contrary to the usual
422 code. Provide a matching oob-layout in this case. See rts_from4.c and
429 -----------------------
433 block information would be lost. It is possible to check the bad block
440 - Per device
445 - Per chip
447 A bad block table is used per chip and contains the bad block
448 information for this particular chip.
450 - Fixed offset
452 The bad block table is located at a fixed offset in the chip
453 (device). This applies to various DiskOnChip devices.
455 - Automatic placed
458 the end or at the beginning of a chip (device)
460 - Mirrored tables
462 The bad block table is mirrored on the chip (device) to allow updates
467 descriptors depending on the chip information which was retrieved by
472 checking the bad block information on the flash chip itself.
477 It may be desired or necessary to keep a bad block table in FLASH. For
478 AG-AND chips this is mandatory, as they have no factory marked bad
480 erased when the block is erased to be reused. So in case of powerloss
481 before writing the pattern back to the chip this block would be lost and
482 added to the bad blocks. Therefore we scan the chip(s) when we detect
488 bad block table management functions are allowed to circumvent this
491 The simplest way to activate the FLASH based bad block table support is
492 to set the option NAND_BBT_USE_FLASH in the bbt_option field of the
493 nand chip structure before calling nand_scan(). For AG-AND chips is
498 - Store bad block table per chip
500 - Use 2 bits per block
502 - Automatic placement at the end of the chip
504 - Use mirrored tables with version numbers
506 - Reserve 4 blocks at the end of the chip
514 second structure must be created and a pointer to this structure must be
516 is set to NULL then only the main table is used and no scan for the
521 predefined constants from rawnand.h to define the options.
523 - Number of bits per block
527 - Table per chip
530 table is managed for each chip in a chip array. If this option is not
533 - Table location is absolute
537 you have selected bad block tables per chip and you have a multi chip
538 array then the start page must be given for each chip in the chip
542 - Table location is automatically detected
545 of the chip (device). Set NAND_BBT_LASTBLOCK to place the bad block
546 table at the end of the chip (device). The bad block tables are
549 a pointer to the pattern in the pattern field. Further the length of
550 the pattern has to be stored in len and the offset in the spare area
554 - Table creation
556 Set the option NAND_BBT_CREATE to enable the table creation if no
558 a new chip is found.
560 - Table write support
562 Set the option NAND_BBT_WRITE to enable the table write support.
564 to be marked bad due to wear. The MTD interface function
571 - Table version control
573 Set the option NAND_BBT_VERSION to enable the table version
574 control. It's highly recommended to enable this for mirrored tables
576 block table information is reduced to the loss of the information
582 - Save block contents on write
591 - Number of reserved blocks
601 --------------------------
606 - Placement defined by fs driver
608 - Automatic placement
612 to hardware ECC functionality the default placement does not fit then
630 - useecc
633 file include/mtd/mtd-abi.h contains constants to select ecc and
639 - eccbytes
643 - eccpos
648 - oobfree
659 The calling function provides a pointer to a nand_oobinfo structure
676 according to the given scheme in the nand_oobinfo structure.
681 Automatic placement uses the built in defaults to place the ecc bytes in
682 the spare area. If filesystem data have to be stored / read into the
688 according to the default builtin scheme.
691 ----------------------------------------
705 block is bad. This applies only to the first
729 block is bad. This applies only to the first
736 0x08 - 0x0F Autoplace 0 - 7
746 is bad. This applies only to the first page in a
750 0x02-0x27 Autoplace 0 - 37
809 as you want to a page. The consecutive writes to a page, before erasing
810 it again, are restricted to 1-3 writes, depending on the manufacturers
811 specifications. This applies similar to the spare area.
814 or hold a writebuffer to collect smaller writes until they sum up to
817 The spare area usage to store filesystem data is controlled by the spare
824 The MTD project provides a couple of helpful tools to handle NAND Flash.
826 - flasherase, flasheraseall: Erase and format FLASH partitions
828 - nandwrite: write filesystem images to NAND FLASH
830 - nanddump: dump the contents of a NAND FLASH partitions
842 Chip option constants
843 ---------------------
845 Constants for chip id table
848 These constants are defined in rawnand.h. They are OR-ed together to
849 describe the chip functionality::
855 /* Chip has cache program function */
857 /* Chip has copy back function */
859 /* AND Chip which has 4 banks and a confusing page / block
862 /* Chip has a array of 4 pages which can be read without
870 These constants are defined in rawnand.h. They are OR-ed together to
875 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
880 -----------------------
882 Use these constants to select the ECC algorithm::
899 ----------------------------------
904 /* Select the chip by setting nCE to low */
906 /* Deselect the chip by setting nCE to high */
908 /* Select the command latch by setting CLE to high */
910 /* Deselect the command latch by setting CLE to low */
912 /* Select the address latch by setting ALE to high */
914 /* Deselect the address latch by setting ALE to low */
916 /* Set write protection by setting WP to high. Not used! */
918 /* Clear write protection by setting WP to low. Not used! */
923 ---------------------------------
940 /* bbt is stored per chip on multichip devices */
961 .. kernel-doc:: include/linux/mtd/rawnand.h
972 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
984 .. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
987 .. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c
993 The following people have contributed to the NAND driver:
1004 The following people have contributed to this document: