Lines Matching +full:system +full:- +full:power +full:- +full:controller

1 .. SPDX-License-Identifier: GPL-2.0
4 Low Power Idle Table (LPIT)
7 To enumerate platform Low Power Idle states, Intel platforms are using
8 “Low Power Idle Table” (LPIT). More details about this table can be
12 Residencies for each low power state can be read via FFH
18   - CPU PKG C10 (Read via FFH interface)
19   - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
24   /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
25   /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
31 residency, or system time spent with the SLP_S0# signal asserted.
32 This is the lowest possible system power state, achieved only when CPU is in
33 PKG C10 and all functional blocks in PCH are in a low power state.