Lines Matching full:data
38 The MAC-PHY is specified to carry both data (Ethernet frames) and control
45 Two types of transactions are defined in the protocol: data transactions
47 read/write transfers. A chunk is the basic element of data transactions
49 each chunk. Ethernet frames are transferred over one or more data chunks.
56 processing and to setup the next SPI data or control transaction.
58 SPI data transactions consist of an equal number of transmit (TX) and
60 or may not contain valid frame data independent from each other, allowing
64 Each transmit data chunk begins with a 32-bit data header followed by a
65 data chunk payload on MOSI. The data header indicates whether transmit
66 frame data is present and provides the information to determine which
67 bytes of the payload contain valid frame data.
69 In parallel, receive data chunks are received on MISO. Each receive data
70 chunk consists of a data chunk payload ending with a 32-bit data footer.
71 The data footer indicates if there is receive frame data present within
73 of the payload contain valid frame data.
149 - Performs Ethernet frames transaction using the data transaction protocol
156 Data Transaction
160 the MAC-PHY will be converted into multiple transmit data chunks. Each
161 transmit data chunk will have a 4 bytes header which contains the
163 transmit frame data within the 64 bytes data chunk payload.
176 DNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI
177 transaction. For TX data chunks, this bit shall be ’1’.
179 1 - Data chunk
181 SEQ (Bit 30) - Data Chunk Sequence. This bit is used to indicate an
182 even/odd transmit data chunk sequence to the MAC-PHY.
185 the MAC-PHY from conveying RX data on the MISO for the
189 any receive frame data within the current chunk.
197 DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate
198 whether the current chunk contains valid transmit frame data
201 the setting of the DV bit in the data header.
205 transmit data chunk payload. Otherwise, this bit shall be
210 contain the 32-bit word offset into the transmit data
218 of an Ethernet frame is present in the current transmit data
222 the byte offset into the transmit data chunk payload
235 P (Bit 0) - Parity. Parity bit calculated over the transmit data header.
239 transmit data chunk payloads is represented as transmit credits. The
242 received from the MAC-PHY. The SPI host should not write more data chunks
246 In case the previous data footer had no transmit credits available and
247 once the transmit credits become available for transmitting transmit data
249 first data header this interrupt will be deasserted and the received
250 footer for the first data chunk will have the transmit credits available
254 host will be sent as multiple receive data chunks. Each receive data
255 chunk will have 64 bytes of data chunk payload followed by 4 bytes footer
257 location of the receive frame data within the 64 bytes data chunk payload.
274 received a control or data header with a parity error.
286 data chunks of frame data that are available for
287 reading beyond the current receive data chunk. This
288 field is zero when there is no receive frame data
295 DV (Bit 21) - Data Valid flag. The MAC-PHY uses this bit to indicate
296 whether the current receive data chunk contains valid
297 receive frame data (DV = 1) or not (DV = 0). When ‘0’, the
307 32-bit word offset into the receive data chunk payload
321 received Ethernet frame is present in this receive data
325 byte offset into the receive data chunk payload that
340 of transmit data chunks of frame data that the SPI host
344 P (Bit 0) - Parity. Parity bit calculated over the receive data footer.
347 SPI host will initiate the data receive transaction based on the receive
349 footer (RCA - Receive Chunks Available). SPI host will create data invalid
350 transmit data chunks (empty chunks) or data valid transmit data chunks in
355 In case the previous data footer had no receive data chunks available and
356 once the receive data chunks become available again for reading, the
357 MAC-PHY interrupt is asserted to SPI host. On reception of the first data
359 first data chunk will have the receive chunks available information.
367 data footer had no receive data chunks available and once the receive
368 data chunks become available for reading. On reception of the first data
372 previous data footer indicated no transmit credits available and once the
373 transmit credits become available for transmitting transmit data chunks.
374 On reception of the first data header this interrupt will be deasserted.
376 Extended status event - This interrupt is asserted when the previous data
379 the corresponding error/event. On reception of the first data header this
387 DNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI
390 1 - Data chunk
397 WNR (Bit 29) - Write-Not-Read. This bit indicates if data is to be written
425 header followed by register write data in case of control write command.
427 The MAC-PHY ignores the final 4 bytes of data from the SPI host at the end
433 write data. Control write commands can write either a single register or
439 The MAC-PHY ignores all data from the SPI host following the control
445 by register read data. Control read commands can read either a single
496 frames data to start at the beginning of any receive data chunk payload with a