Lines Matching +full:0 +full:x23c

52   If PCSROffset=0b0000, on ARMv8-a the feature of EDPCSR is not implemented;
59   If PCSROffset=0b0010, ARMv8-a defines "EDPCSR implemented, and samples have
61   state". So on ARMv8 if EDDEVID1.PCSROffset is 0b0010 and the CPU operates
143 To disable it, write a '0' into /sys/kernel/debug/coresight_cpu_debug/enable::
145   # echo 0 > /sys/kernel/debug/coresight_cpu_debug/enable
165   # exec 3<> /dev/cpu_dma_latency; echo 0 >&3
184   coresight-cpu-debug 850000.debug: CPU[0]:
186   coresight-cpu-debug 850000.debug:  EDPCSR:  handle_IPI+0x174/0x1d8
188 …esight-cpu-debug 850000.debug:  EDVIDSR: 90000000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)
191   coresight-cpu-debug 852000.debug:  EDPCSR:  debug_notifier_call+0x23c/0x358
193 …esight-cpu-debug 852000.debug:  EDVIDSR: 90000000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)