Lines Matching +full:non +full:- +full:configurable
5 Quite some CPUs have speculation-related misfeatures which are in
10 forms. Some of these mitigations are compile-time configurable and some
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28 which is selected with arg2 of prctl(2). The return value uses bits 0-3 with
48 If PR_SPEC_PRCTL is set, then the per-task control of the mitigation is
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92 - PR_SPEC_STORE_BYPASS: Speculative Store Bypass
101 - PR_SPEC_INDIR_BRANCH: Indirect Branch Speculation in User Processes
110 - PR_SPEC_L1D_FLUSH: Flush L1D Cache on context switch out of the task
111 (works only when tasks run on non SMT cores)